8(T:rockchip,rk3399-evbrockchip,rk3399google,rk3399evb-rev2 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53pscid  cpu@1cpuarm,cortex-a53pscid  cpu@2cpuarm,cortex-a53pscid  cpu@3cpuarm,cortex-a53pscid  cpu@100cpuarm,cortex-a72psci   cpu@101cpuarm,cortex-a72psci   idle-states(pscicpu-sleeparm,idle-state5F]xn~ cluster-sleeparm,idle-state5F]n~ display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmu pmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mamba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecellm@  apb_pclk Adma-controller@ff6e0000arm,pl330arm,primecelln@  apb_pclk 0pcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ , Gaclkaclk-perfhclkpm01236syslegacyclientF`Ygv ~,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclk disabled  defaultinterrupt-controller ethernet@fe300000rockchip,rk3399-gmac0 6macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmacethokay)input6Argmiidefault JZ p'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р Mbiuciuciu-driveciu-sampleyreset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр  Lbiuciuciu-driveciu-samplezreset disabledsdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclock~ phy_arasanokay pusb@fe380000 generic-ehci8usbhostarbiterutmi~usbokayusb@fe3a0000 generic-ohci:usbhostarbiterutmi~usbokayusb@fe3c0000 generic-ehci<usbhostarbiterutmi~usbokayusb@fe3e0000 generic-ohci> usbhostarbiterutmi~usbokayusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend-otg~usb2-phyusb3-phy 5utmi_wide>Vw disabledusb@fe900000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk& usb3-otg disabledusb@fe900000 snps,dwc3nrefbus_earlysuspend-otg~ !usb2-phyusb3-phy 5utmi_wide>Vw disableddp@fec00000rockchip,rk3399-cdn-dp r  ruocore-clkpclkspdifgrf~"# HJspdifdptxapbcore disabledportsport+endpoint@0$ endpoint@1% yinterrupt-controller@fee00000 arm,gic-v3+P   interrupt-controller@fee20000arm,gic-v3-its ppi-partitionsinterrupt-partition-0 interrupt-partition-1 saradc@ff100000rockchip,rk3399-saradc> Pesaradcapb_pclk saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cA AU i2cpclk;default&+ disabledi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#default'+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"default(+ disabledi2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&default)+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%default*+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$default++ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkc(default, disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkb(default- disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkd(default.okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclke(default/ disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkD50 0 :txrxdefault1234+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk550 0 :txrxdefault5678+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4500:txrxdefault9:;<+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkC500:txrxdefault=>?@+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclk5AA :txrxdefaultBCDE+ disabledthermal-zonescpuDdZhFtripscpu_alert0xppassive Gcpu_alert1x$passive Hcpu_critxs criticalcooling-mapsmap0Gmap1HHgpuDdZhFtripsgpu_alert0x$passivegpu_critxs criticaltsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbsinitdefaultsleepIJI disabled Fqos@ffa58000syscon  Rqos@ffa5c000syscon  Sqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon  Vqos@ffa70080syscon  Wqos@ffa74000syscon@  Tqos@ffa76000syscon`  Uqos@ffa90000syscon  Xqos@ffa98000syscon  Kqos@ffaa0000syscon  Yqos@ffaa0080syscon  Zqos@ffaa8000syscon  [qos@ffaa8080syscon  \qos@ffab0000syscon  Lqos@ffab0080syscon  Mqos@ffab8000syscon  Nqos@ffac0000syscon  Oqos@ffac0080syscon  Pqos@ffac8000syscon  ]qos@ffac8080syscon  ^qos@ffad0000syscon  _qos@ffad8080syscon qos@ffae0000syscon  Qpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+ pd_iep@34"Kpd_rga@33!LMpd_vcodec@31Npd_vdu@32 OPpd_gpu@35#Qpd_edp@25lpd_emmc@23Rpd_gmac@22fSpd_sd@27LTpd_sdioaudio@28Upd_usb3@24VWpd_vio@15+pd_hdcp@21rXpd_isp0@19YZpd_isp1@20[\pd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17]^pd_vopl@18_syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+ nio-domains&rockchip,rk3399-pmu-io-voltage-domain disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5``spiclkapb_pclk<defaultabcd+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7``"baudclkapb_pclkf(defaulte disabledi2c@ff3c0000rockchip,rk3399-i2c<`  ` ` i2cpclk9defaultf+ disabledi2c@ff3d0000rockchip,rk3399-i2c=`  ` ` i2cpclk8defaultg+ disabledi2c@ff3e0000rockchip,rk3399-i2c>`  ` ` i2cpclk:defaulth+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaulti`pwmokay pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBdefaultj`pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB defaultk`pwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0defaultl`pwmokay video-codec@ff650000rockchip,rk3399-vpue rq 6vepuvdpu aclkhclk miommu@ff650800rockchip,iommue@s6vpu_mmu aclkiface miommu@ff660480rockchip,iommu f@f@u 6vdec_mmu aclkiface disablediommu@ff670800rockchip,iommug@*6iep_mmu aclkiface disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruun`(J `clock-controller@ff760000rockchip,rk3399-cruv@BCx@#g/;рxh<4`#Fׄׄ  syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+ io-domains"rockchip,rk3399-io-voltage-domain disabledusb2-phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480mokay host-port+ 6linestateokay6o otg-port+0ghj6otg-bvalidotg-idlinestate disabled usb2-phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480mokay host-port+ 6linestateokay6o otg-port+0lmo6otg-bvalidotg-idlinestate disabled phy@f780rockchip,rk3399-emmc-phy$pemmcclk+okay pcie-phyrockchip,rk3399-pcie-phyrefclk+62phy disabled phy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port+ "usb3-port+ phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port+ #usb3-port+ !watchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifB5A:tx mclkhclkUdefaultq disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'5AA:txrxi2s_clki2s_hclkVdefaultr disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(5AA:txrxi2s_clki2s_hclkWdefaults disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)5AA:txrxi2s_clki2s_hclkX disabled vop@ff8f0000rockchip,rk3399-vop-lit>wׄaclk_vopdclk_vophclk_vop t axiahbdclk disabledport+ endpoint@0u endpoint@1v endpoint@2w endpoint@3x endpoint@4y %iommu@ff8f3f00rockchip,iommu?w 6vopl_mmu aclkiface disabled tvop@ff900000rockchip,rk3399-vop-big>vׄaclk_vopdclk_vophclk_vop z axiahbdclk disabledport+ endpoint@0{ endpoint@1| endpoint@2} endpoint@3~ endpoint@4 $iommu@ff903f00rockchip,iommu?v 6vopb_mmu aclkiface disabled ziommu@ff914000rockchip,iommu @P+ 6isp0_mmu aclkifaceJiommu@ff924000rockchip,iommu @P, 6isp1_mmu aclkifaceJhdmi-soundsimple-audio-cardei2s~ hdmi-sound disabledsimple-audio-card,cpusimple-audio-card,codechdmi@ff940000rockchip,rk3399-dw-hdmi(tqopiahbisfrvpllgrfcec( disabled portsport+endpoint@0 }endpoint@1 wmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- porefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0 |endpoint@1 umipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi. qorefpclkphy_cfggrfapb+ disabledports+port@0+endpoint@0 ~endpoint@1 xedp@ff970000rockchip,rk3399-edp jlo dppclkgrfdefaultdp disabledports+port@0+endpoint@0 {endpoint@1 vgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 6jobmmugpu# disabledpinctrlrockchip,rk3399-pinctrln+gpio0@ff720000rockchip,gpio-bankr`gpio1@ff730000rockchip,gpio-banks` gpio2@ff780000rockchip,gpio-bankxPgpio3@ff788000rockchip,gpio-bankxQ gpio4@ff790000rockchip,gpio-bankyR pcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-12ma  pcfg-pull-none-13ma  pcfg-pull-none-18ma pcfg-pull-none-20ma pcfg-pull-up-2ma pcfg-pull-up-8ma pcfg-pull-up-18ma pcfg-pull-up-20ma pcfg-pull-down-4ma pcfg-pull-down-8ma pcfg-pull-down-12ma pcfg-pull-down-18ma pcfg-pull-down-20ma pcfg-output-highpcfg-output-low&clockclk-32k1edpedp-hpd1 gmacrgmii-pins1     rmii-pins1     i2c0i2c0-xfer 1 fi2c1i2c1-xfer 1 &i2c2i2c2-xfer 1 'i2c3i2c3-xfer 1 (i2c4i2c4-xfer 1   gi2c5i2c5-xfer 1   )i2c6i2c6-xfer 1   *i2c7i2c7-xfer 1 +i2c8i2c8-xfer 1 hi2s0i2s0-2ch-bus`1i2s0-8ch-bus1 ri2s1i2s1-2ch-busP1 ssdio0sdio0-bus11sdio0-bus4@1sdio0-cmd1sdio0-clk1sdio0-cd1sdio0-pwr1sdio0-bkpwr1sdio0-wp1sdio0-int1sdmmcsdmmc-bus11sdmmc-bus4@1   sdmmc-clk1 sdmmc-cmd1 sdmmc-cd1sdmmc-wp1sleepap-pwroff1ddrio-pwroff1spdifspdif-bus1 qspdif-bus-11spi0spi0-clk1 1spi0-cs01 4spi0-cs11spi0-tx1 2spi0-rx1 3spi1spi1-clk1  5spi1-cs01  8spi1-rx1 7spi1-tx1 6spi2spi2-clk1  9spi2-cs01  <spi2-rx1  ;spi2-tx1  :spi3spi3-clk1 aspi3-cs01 dspi3-rx1 cspi3-tx1 bspi4spi4-clk1 =spi4-cs01 @spi4-rx1 ?spi4-tx1 >spi5spi5-clk1 Bspi5-cs01 Espi5-rx1 Dspi5-tx1 Ctestclktest-clkout01test-clkout11test-clkout21tsadcotp-gpio1 Iotp-out1 Juart0uart0-xfer 1 ,uart0-cts1uart0-rts1uart1uart1-xfer 1   -uart2auart2a-xfer 1 uart2buart2b-xfer 1uart2cuart2c-xfer 1 .uart3uart3-xfer 1 /uart3-cts1uart3-rts1uart4uart4-xfer 1 euarthdcpuarthdcp-xfer 1pwm0pwm0-pin1 ipwm0-pin-pull-down1vop0-pwm-pin1vop1-pwm-pin1pwm1pwm1-pin1 jpwm1-pin-pull-down1pwm2pwm2-pin1 kpwm2-pin-pull-down1pwm3apwm3a-pin1 lpwm3bpwm3b-pin1hdmihdmi-i2c-xfer 1hdmi-cec1pciepci-clkreqn-cpm1 pci-clkreqnb-cpm1pmicpmic-int-l1pmic-dvs21usb2vcc5v0-host-en1 backlightpwm-backlight?  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~Q j waexternal-gmac-clock fixed-clocksY@ clkin_gmac vdd-centerpwm-regulatorwa |vdd_center 5\okayvcc3v3-sysregulator-fixed |vcc3v3_sys2Z2Zvcc5v0-sysregulator-fixed |vcc5v0_sysLK@LK@ vcc5v0-host-regulatorregulator-fixed Udefault |vcc5v0_host ovcc-phy-regulatorregulator-fixed|vcc_phy  compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthassigned-clock-ratesarasan,soc-ctl-syscondisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthdmasdma-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qos#pwm-cellsiommus#iommu-cells#reset-cells#phy-cellsdrive-impedance-ohmrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-dairockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsbrightness-levelsdefault-brightness-levelenable-gpiospwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onenable-active-highvin-supply