8(altr,socfpga-stratix10 &SoCFPGA Stratix 10 SoCDKcpus cpu@0arm,cortex-a53arm,armv8,cpu8psciFJcpu@1arm,cortex-a53arm,armv8,cpu8psciFJcpu@2arm,cortex-a53arm,armv8,cpu8psciFJcpu@3arm,cortex-a53arm,armv8,cpu8psciFJpmuarm,armv8-pmuv30R]ppsci arm,psci-0.2?smcintc@fffc1000arm,gic-400arm,cortex-a15-gic@F @ ` Jsoc  simple-bus,socpclkmgr@ffd1000 altr,clk-mgrFethernet@ff8000000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacF  RZmacirq  stmmacethokayrgmiimdio0 snps,dwmac-mdioethernet-phy@0F!.;HUbo|DJethernet@ff8020000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacF  R[macirq! stmmaceth disabledethernet@ff8040000altr,socfpga-stmmacsnps,dwmac-3.74asnps,dwmacF@  R\macirq" stmmaceth disabledgpio@ffc03200 snps,dw-apb-gpioF2X disabledgpio-controller@0snps,dw-apb-gpio-portF Rngpio@ffc03300 snps,dw-apb-gpioF3Yokaygpio-controller@0snps,dw-apb-gpio-portF RoJ i2c@ffc02800 snps,designware-i2cF( RgH disabledi2c@ffc02900 snps,designware-i2cF) RhI disabledi2c@ffc02a00 snps,designware-i2cF* RiJ disabledi2c@ffc02b00 snps,designware-i2cF+ RjK disabledi2c@ffc02c00 snps,designware-i2cF, RkL disableddwmmc0@ff808000 altr,socfpga-dw-mshcF R`'resetokaysram@ffe00000 mmio-sramFrstmgr@ffd11000 altr,rst-mgrF Jspi@ffda4000snps,dw-apb-ssi F@ Re%4 disabledspi@ffda5000snps,dw-apb-ssi FP Rf%4 disabledsysmgr@ffd12000altr,sys-mgrsysconF (timerarm,armv8-timer0R   timer0@ffc03000snps,dw-apb-timer RqF0timer1@ffc03100snps,dw-apb-timer RrF1timer2@ffd00000snps,dw-apb-timer RsFtimer3@ffd00100snps,dw-apb-timer RtFserial0@ffc02000snps,dw-apb-uartF  Rl<FPokayserial1@ffc02100snps,dw-apb-uartF! Rm<FQ disabledusbphy@0Susb-nop-xceivokayJusb@ffb00000 snps,dwc2F R]^ cusb2-phy#dwc2 disabledusb@ffb40000 snps,dwc2F R^^ cusb2-phy$dwc2 disabledwatchdog@ffd00200 snps,dw-wdtF Ru@ disabledwatchdog@ffd00300 snps,dw-wdtF RvA disabledwatchdog@ffd00400 snps,dw-wdtF R}B disabledwatchdog@ffd00500 snps,dw-wdtF R~C disabledaliasesm/soc/serial0@ffc02000chosenuserial0:115200n8leds gpio-ledshps0 hps_led0  hps1 hps_led1  hps2 hps_led2  memory,memoryF compatible#address-cells#size-cellsmodeldevice_typeenable-methodregphandleinterruptsinterrupt-affinityinterrupt-parent#interrupt-cellsinterrupt-controllerrangesinterrupt-namesmac-addressresetsreset-namesstatusphy-modephy-handlemax-frame-sizetxd0-skew-pstxd1-skew-pstxd2-skew-pstxd3-skew-psrxd0-skew-psrxd1-skew-psrxd2-skew-psrxd3-skew-pstxen-skew-pstxc-skew-psrxdv-skew-psrxc-skew-psgpio-controller#gpio-cellssnps,nr-gpiosfifo-depthnum-slotscap-sd-highspeedbroken-cdbus-width#reset-cellsaltr,modrst-offsetnum-chipselectbus-numreg-shiftreg-io-width#phy-cellsphysphy-namesserial0stdout-pathlabel