8x(?@:rockchip,rk3399-evbrockchip,rk3399google,rk3399evb-rev2 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscidcpu@1cpuarm,cortex-a53arm,armv8pscidcpu@2cpuarm,cortex-a53arm,armv8pscidcpu@3cpuarm,cortex-a53arm,armv8pscidcpu@100cpuarm,cortex-a72arm,armv8psci cpu@101cpuarm,cortex-a72arm,armv8psci display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmu  pmu_a72arm,cortex-a72-pmu  psci arm,psci-1.0smctimerarm,armv8-timer@    xin24m fixed-clock-n6=xin24mPamba simple-bus+]dma-controller@ff6d0000arm,pl330arm,primecellm@  d oapb_pclkedma-controller@ff6e0000arm,pl330arm,primecelln@  d oapb_pclkpcie@f8000000rockchip,rk3399-pcie {axi-baseapb-basepci+ Goaclkaclk-perfhclkpm0 123syslegacyclient`     ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38]8( coremgmtmgmt-stickypipepmpclkaclk disabled  &0default>interrupt-controllerH ethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfMostmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac]  stmmacethkokayxinputrgmii0default>  'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@ @ р Mobiuciuciu-driveciu-sample]y reset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@ A р Lobiuciuciu-driveciu-sample]z reset disabledsdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 &xN< Noclk_xinclk_ahb=emmc_cardclockP phy_arasan]Qokaybl{dusb@fe380000 generic-ehci8 ousbhostarbiterutmiusbokayusb@fe3a0000 generic-ohci: ousbhostarbiterutmiusbokayusb@fe3c0000 generic-ehci< ousbhostarbiterutmiusbokayusb@fe3e0000 generic-ohci> ousbhostarbiterutmiusbokayusb@fe800000rockchip,rk3399-dwc3+] $oref_clksuspend_clkbus_clkgrf_clk disabledusb@fe800000 snps,dwc3 iotg usb2-phy utmi_wide' disabledusb@fe900000rockchip,rk3399-dwc3+] $oref_clksuspend_clkbus_clkgrf_clk disabledusb@fe900000 snps,dwc3 notg usb2-phy utmi_wide' disabledinterrupt-controller@fee00000 arm,gic-v3+]HP   interrupt-controller@fee20000arm,gic-v3-itsIppi-partitionsinterrupt-partition-0X interrupt-partition-1X saradc@ff100000rockchip,rk3399-saradc >aPeosaradcapb_pclk  saradc-apb disabledi2c@ff110000rockchip,rk3399-i2cxA< AU oi2cpclk ;0default>+ disabledi2c@ff120000rockchip,rk3399-i2cxB< BV oi2cpclk #0default>+ disabledi2c@ff130000rockchip,rk3399-i2cxC< CW oi2cpclk "0default> + disabledi2c@ff140000rockchip,rk3399-i2cxD< DX oi2cpclk &0default>!+ disabledi2c@ff150000rockchip,rk3399-i2cxE< EY oi2cpclk %0default>"+ disabledi2c@ff160000rockchip,rk3399-i2cxF< FZ oi2cpclk $0default>#+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`obaudclkapb_pclk cs}0default>$ disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRaobaudclkapb_pclk bs}0default>% disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbobaudclkapb_pclk ds}0default>&okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcobaudclkapb_pclk es}0default>' disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[ospiclkapb_pclk D0default>()*++ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\ospiclkapb_pclk 50default>,-./+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]ospiclkapb_pclk 40default>0123+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^ospiclkapb_pclk C0default>4567+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_ospiclkapb_pclk 0default>89:;]+ disabledthermal-zonescpud<tripscpu_alert0ppassive=cpu_alert1$passive>cpu_crits criticalcooling-mapsmap0= map1>gpud<tripsgpu_alert0$passive?gpu_crits criticalcooling-mapsmap0? tsadc@ff260000rockchip,rk3399-tsadc& axO< qOdotsadcapb_pclk  tsadc-apbks0initdefaultsleep>@A @ disabled<qos@ffa58000syscon Iqos@ffa5c000syscon Jqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon qos@ffa70080syscon qos@ffa74000syscon@ Kqos@ffa76000syscon` Lqos@ffa90000syscon Mqos@ffa98000syscon Bqos@ffaa0000syscon Nqos@ffaa0080syscon Oqos@ffaa8000syscon Pqos@ffaa8080syscon Qqos@ffab0000syscon Cqos@ffab0080syscon Dqos@ffab8000syscon Eqos@ffac0000syscon Fqos@ffac0080syscon Gqos@ffac8000syscon Rqos@ffac8080syscon Sqos@ffad0000syscon Tqos@ffad8080syscon qos@ffae0000syscon Hpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller*+pd_iep@34">Bpd_rga@33!>CDpd_vcodec@31>Epd_vdu@32 >FGpd_gpu@35#>Hpd_edp@25lpd_emmc@23>Ipd_gmac@22f>Jpd_sd@27L>Kpd_sdioaudio@28>Lpd_vio@15+pd_hdcp@21r>Mpd_isp0@19>NOpd_isp1@20>PQpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17>RSpd_vopl@18>Tsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+bio-domains&rockchip,rk3399-pmu-io-voltage-domain disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5UUospiclkapb_pclk <0default>VWXY+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7UU"obaudclkapb_pclk fs}0default>Z disabledi2c@ff3c0000rockchip,rk3399-i2c<xU < U U oi2cpclk 90default>[+ disabledi2c@ff3d0000rockchip,rk3399-i2c=xU < U U oi2cpclk 80default>\+ disabledi2c@ff3e0000rockchip,rk3399-i2c>xU < U U oi2cpclk :0default>]+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBE0default>^Uopwmokay~pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBE0default>_Uopwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB E0default>`Uopwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0E0default>aUopwmokayiommu@ff650800rockchip,iommue@ svpu_mmuP disablediommu@ff660480rockchip,iommu f@f@ u vdec_mmuP disablediommu@ff670800rockchip,iommug@ *iep_mmuP disabledrga@ff680000rockchip,rk3399-rgah 7moaclkhclksclkjgi  coreaxiahb]!efuse@ff690000rockchip,rk3399-efusei+} opclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruukbP]xU<(JUclock-controller@ff760000rockchip,rk3399-cruvkP]`x@BC0<#g/;рxh<4`#Fsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain disabledusb2-phy@e450rockchip,rk3399-usb2phyP{ophyclkP=clk_usbphy0_480mokayhost-portj  linestateokaycotg-portj0 ghjotg-bvalidotg-idlinestate disabledusb2-phy@e460rockchip,rk3399-usb2phy`|ophyclkP=clk_usbphy1_480mokayhost-portj  linestateokaycotg-portj0 lmootg-bvalidotg-idlinestate disabledphy@f780rockchip,rk3399-emmc-phy$doemmcclkjokaypcie-phyrockchip,rk3399-pcie-phyorefclkj phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}otcpdcoretcpdphy-refx~<]L uphyuphy-pipeuphy-tcphyk u    disableddp-portjusb3-portjphy@ff800000rockchip,rk3399-typec-phyotcpdcoretcpdphy-refx<] M uphyuphy-pipeuphy-tcphyk u    disableddp-portjusb3-portjwatchdog@ff848000 snps,dw-wdt| xrktimer@ff850000rockchip,rk3399-timer QhZ opclktimerspdif@ff870000rockchip,rk3399-spdif Betx omclkhclkU0default>f] disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sk 'eetxrxoi2s_clki2s_hclkV0default>g] disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s (eetxrxoi2s_clki2s_hclkW0default>h] disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s )eetxrxoi2s_clki2s_hclkX] disabledvop@ff8f0000rockchip,rk3399-vop-lit> wx<ׄoaclk_vopdclk_vophclk_vopi]  axiahbdclk disabledport+ endpoint@0jtendpoint@1kwendpoint@2lriommu@ff8f3f00rockchip,iommu? w vopl_mmu oaclkhclk]P disabledivop@ff900000rockchip,rk3399-vop-big> vx<ׄoaclk_vopdclk_vophclk_vopm]  axiahbdclk disabledport+ endpoint@0nvendpoint@1osendpoint@2pqiommu@ff903f00rockchip,iommu? v vopb_mmu oaclkhclk]P disabledmiommu@ff914000rockchip,iommu @P + isp0_mmuP disablediommu@ff924000rockchip,iommu @P , isp1_mmuP disabledhdmi@ff940000rockchip,rk3399-dw-hdmi (tqopoiahbisfrvpllgrfcec]}k disabledportsport+endpoint@0qpendpoint@1rlmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi - poorefpclkphy_cfggrf]k disabledportsport+endpoint@0soendpoint@1tjedp@ff970000rockchip,rk3399-edp jlodppclk0default>u] dpk disabledports+port@0+endpoint@0vnendpoint@1wkgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600  jobmmugpu]# disabledpinctrlrockchip,rk3399-pinctrlkb+]gpio0@ff720000rockchip,gpio-bankrU -Hgpio1@ff730000rockchip,gpio-banksU -H}gpio2@ff780000rockchip,gpio-bankxP -Hgpio3@ff788000rockchip,gpio-bankxQ -Hgpio4@ff790000rockchip,gpio-bankyR -Hpcfg-pull-up9{pcfg-pull-downF|pcfg-pull-noneUxpcfg-pull-none-12maUb zpcfg-pull-up-8ma9bpcfg-pull-down-4maFbpcfg-pull-up-2ma9bpcfg-pull-down-12maFb pcfg-pull-none-13maUb yclockclk-32kqxedpedp-hpdqxugmacrgmii-pinsqyx x y x xxxxyyxxyyrmii-pinsq x y x x xxxxyyi2c0i2c0-xfer qxx[i2c1i2c1-xfer qxxi2c2i2c2-xfer qzzi2c3i2c3-xfer qxx i2c4i2c4-xfer q x x\i2c5i2c5-xfer q x x!i2c6i2c6-xfer q x x"i2c7i2c7-xfer qxx#i2c8i2c8-xfer qxx]i2s0i2s0-8ch-busqxxxxxxxxxgi2s1i2s1-2ch-busPqxxxxxhsdio0sdio0-bus1q{sdio0-bus4@q{{{{sdio0-cmdq{sdio0-clkqxsdio0-cdq{sdio0-pwrq{sdio0-bkpwrq{sdio0-wpq{sdio0-intq{sdmmcsdmmc-bus1q{sdmmc-bus4@q{ { { {sdmmc-clkq xsdmmc-cmdq {sdmmc-cdq{sdmmc-wpq{sleepap-pwroffqxddrio-pwroffqxspdifspdif-busqxfspdif-bus-1qxspi0spi0-clkq{(spi0-cs0q{+spi0-cs1q{spi0-txq{)spi0-rxq{*spi1spi1-clkq {,spi1-cs0q {/spi1-rxq{.spi1-txq{-spi2spi2-clkq {0spi2-cs0q {3spi2-rxq {2spi2-txq {1spi3spi3-clkq{Vspi3-cs0q{Yspi3-rxq{Xspi3-txq{Wspi4spi4-clkq{4spi4-cs0q{7spi4-rxq{6spi4-txq{5spi5spi5-clkq{8spi5-cs0q{;spi5-rxq{:spi5-txq{9tsadcotp-gpioqx@otp-outqxAuart0uart0-xfer q{x$uart0-ctsqxuart0-rtsqxuart1uart1-xfer q { x%uart2auart2a-xfer q{ xuart2buart2b-xfer q{xuart2cuart2c-xfer q{x&uart3uart3-xfer q{x'uart3-ctsqxuart3-rtsqxuart4uart4-xfer q{xZuarthdcpuarthdcp-xfer q{xpwm0pwm0-pinqx^vop0-pwm-pinqxpwm1pwm1-pinqx_vop1-pwm-pinqxpwm2pwm2-pinqx`pwm3apwm3a-pinqxapwm3bpwm3b-pinqxhdmihdmi-i2c-xfer qxxhdmi-cecqxpciepci-clkreqn-cpmqxpci-clkreqnb-cpmqxpmicpmic-int-lq{pmic-dvs2q|usb2vcc5v0-host-enqxbacklightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ } ~aexternal-gmac-clock fixed-clock-sY@ =clkin_gmacPvdd-centerpwm-regulatora vdd_center 5\okayvcc3v3-sysregulator-fixed vcc3v3_sys2Z2Zvcc5v0-sysregulator-fixed vcc5v0_sysLK@LK@vcc5v0-host-regulatorregulator-fixed! 0default> vcc5v0_host4cvcc-phy-regulatorregulator-fixedvcc_phy compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-method#cooling-cellsclocksdynamic-power-coefficientphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-deptharasan,soc-ctl-sysconassigned-clock-ratesdisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qos#pwm-cells#iommu-cells#reset-cells#phy-cellsrockchip,typec-conn-dirrockchip,usb3tousb2-enrockchip,external-psmrockchip,pipe-statusdmasdma-namesiommusremote-endpointrockchip,disable-mmu-resetrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsbrightness-levelsdefault-brightness-levelenable-gpiospwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onenable-active-highvin-supply