r8o(/ohisilicon,hip07-d05 +&7Hisilicon Hip07 D05 Development Boardpsci arm,psci-0.2=smccpus+cpu-mapcluster0core0Dcore1Dcore2Dcore3Dcluster1core0Dcore1Dcore2Dcore3D cluster2core0D core1D core2D core3D cluster3core0Dcore1Dcore2Dcore3Dcluster4core0Dcore1Dcore2Dcore3Dcluster5core0Dcore1Dcore2Dcore3Dcluster6core0Dcore1Dcore2Dcore3Dcluster7core0Dcore1Dcore2D core3D!cluster8core0D"core1D#core2D$core3D%cluster9core0D&core1D'core2D(core3D)cluster10core0D*core1D+core2D,core3D-cluster11core0D.core1D/core2D0core3D1cluster12core0D2core1D3core2D4core3D5cluster13core0D6core1D7core2D8core3D9cluster14core0D:core1D;core2D<core3D=cluster15core0D>core1D?core2D@core3DAcpu@10000Hcpuarm,cortex-a72arm,armv8TXpscifBwcpu@10001Hcpuarm,cortex-a72arm,armv8TXpscifBwcpu@10002Hcpuarm,cortex-a72arm,armv8TXpscifBwcpu@10003Hcpuarm,cortex-a72arm,armv8TXpscifBwcpu@10100Hcpuarm,cortex-a72arm,armv8TXpscifCwcpu@10101Hcpuarm,cortex-a72arm,armv8TXpscifCwcpu@10102Hcpuarm,cortex-a72arm,armv8TXpscifCwcpu@10103Hcpuarm,cortex-a72arm,armv8TXpscifCw cpu@10200Hcpuarm,cortex-a72arm,armv8TXpscifDw cpu@10201Hcpuarm,cortex-a72arm,armv8TXpscifDw cpu@10202Hcpuarm,cortex-a72arm,armv8TXpscifDw cpu@10203Hcpuarm,cortex-a72arm,armv8TXpscifDw cpu@10300Hcpuarm,cortex-a72arm,armv8TXpscifEwcpu@10301Hcpuarm,cortex-a72arm,armv8TXpscifEwcpu@10302Hcpuarm,cortex-a72arm,armv8TXpscifEwcpu@10303Hcpuarm,cortex-a72arm,armv8TXpscifEwcpu@30000Hcpuarm,cortex-a72arm,armv8TXpscifFwcpu@30001Hcpuarm,cortex-a72arm,armv8TXpscifFwcpu@30002Hcpuarm,cortex-a72arm,armv8TXpscifFwcpu@30003Hcpuarm,cortex-a72arm,armv8TXpscifFwcpu@30100Hcpuarm,cortex-a72arm,armv8TXpscifGwcpu@30101Hcpuarm,cortex-a72arm,armv8TXpscifGwcpu@30102Hcpuarm,cortex-a72arm,armv8TXpscifGwcpu@30103Hcpuarm,cortex-a72arm,armv8TXpscifGwcpu@30200Hcpuarm,cortex-a72arm,armv8TXpscifHwcpu@30201Hcpuarm,cortex-a72arm,armv8TXpscifHwcpu@30202Hcpuarm,cortex-a72arm,armv8TXpscifHwcpu@30203Hcpuarm,cortex-a72arm,armv8TXpscifHwcpu@30300Hcpuarm,cortex-a72arm,armv8TXpscifIwcpu@30301Hcpuarm,cortex-a72arm,armv8TXpscifIwcpu@30302Hcpuarm,cortex-a72arm,armv8TXpscifIw cpu@30303Hcpuarm,cortex-a72arm,armv8TXpscifIw!cpu@50000Hcpuarm,cortex-a72arm,armv8TXpscifJw"cpu@50001Hcpuarm,cortex-a72arm,armv8TXpscifJw#cpu@50002Hcpuarm,cortex-a72arm,armv8TXpscifJw$cpu@50003Hcpuarm,cortex-a72arm,armv8TXpscifJw%cpu@50100Hcpuarm,cortex-a72arm,armv8TXpscifKw&cpu@50101Hcpuarm,cortex-a72arm,armv8TXpscifKw'cpu@50102Hcpuarm,cortex-a72arm,armv8TXpscifKw(cpu@50103Hcpuarm,cortex-a72arm,armv8TXpscifKw)cpu@50200Hcpuarm,cortex-a72arm,armv8TXpscifLw*cpu@50201Hcpuarm,cortex-a72arm,armv8TXpscifLw+cpu@50202Hcpuarm,cortex-a72arm,armv8TXpscifLw,cpu@50203Hcpuarm,cortex-a72arm,armv8TXpscifLw-cpu@50300Hcpuarm,cortex-a72arm,armv8TXpscifMw.cpu@50301Hcpuarm,cortex-a72arm,armv8TXpscifMw/cpu@50302Hcpuarm,cortex-a72arm,armv8TXpscifMw0cpu@50303Hcpuarm,cortex-a72arm,armv8TXpscifMw1cpu@70000Hcpuarm,cortex-a72arm,armv8TXpscifNw2cpu@70001Hcpuarm,cortex-a72arm,armv8TXpscifNw3cpu@70002Hcpuarm,cortex-a72arm,armv8TXpscifNw4cpu@70003Hcpuarm,cortex-a72arm,armv8TXpscifNw5cpu@70100Hcpuarm,cortex-a72arm,armv8TXpscifOw6cpu@70101Hcpuarm,cortex-a72arm,armv8TXpscifOw7cpu@70102Hcpuarm,cortex-a72arm,armv8TXpscifOw8cpu@70103Hcpuarm,cortex-a72arm,armv8TXpscifOw9cpu@70200Hcpuarm,cortex-a72arm,armv8TXpscifPw:cpu@70201Hcpuarm,cortex-a72arm,armv8TXpscifPw;cpu@70202Hcpuarm,cortex-a72arm,armv8TXpscifPw<cpu@70203Hcpuarm,cortex-a72arm,armv8TXpscifPw=cpu@70300Hcpuarm,cortex-a72arm,armv8TXpscifQw>cpu@70301Hcpuarm,cortex-a72arm,armv8TXpscifQw?cpu@70302Hcpuarm,cortex-a72arm,armv8TXpscifQw@cpu@70303Hcpuarm,cortex-a72arm,armv8TXpscifQwAl2-cache0cacheBl2-cache1cacheCl2-cache2cacheDl2-cache3cacheEl2-cache4cacheFl2-cache5cacheGl2-cache6cacheHl2-cache7cacheIl2-cache8cacheJl2-cache9cacheKl2-cache10cacheLl2-cache11cacheMl2-cache12cacheNl2-cache13cacheOl2-cache14cachePl2-cache15cacheQinterrupt-controller@4d000000 arm,gic-v3+TMM@m@M@m@  interrupt-controller@4c000000arm,gic-v3-itsTLinterrupt-controller@6c000000arm,gic-v3-itsTlRinterrupt-controller@c6000000arm,gic-v3-itsTSinterrupt-controller@8,c6000000arm,gic-v3-itsTinterrupt-controller@400,4c000000arm,gic-v3-itsTLinterrupt-controller@400,6c000000arm,gic-v3-itsTlinterrupt-controller@400,c6000000arm,gic-v3-itsTinterrupt-controller@408,c6000000arm,gic-v3-itsTtimerarm,armv8-timer0   pmuarm,cortex-a72-pmu interrupt-controller@60080000hisilicon,mbigen-v2T`uart_intc R Tinterrupt-controller@a0080000hisilicon,mbigen-v2Tintc_pcie2_a S fintc_sas1 Sdintc_sas2 S@eintc_smmu_pcie S intc_usb SUinterrupt-controller@c0080000hisilicon,mbigen-v2Tintc_dsaf0 SWintc-roce S "aintc-sas0 S bintc_smmu_dsa S soc simple-bus+uart@602b0000arm,sbsa-uartT`+ T',9okohci@a7030000 generic-ohciT U@9okehci@a7020000 generic-ehciT U@9oksub_ctrl_c@60000000hisilicon,peri-subctrlsysconT`Vdsa_subctrl@c0000000hisilicon,dsa-subctrlsysconTXpcie_subctl@a0000000"hisilicon,pcie-sas-subctrlsysconTcsds_ctrl@c2200000sysconT Ymdio@603c0000hisilicon,hns-mdioT`<MV8 8SZ+ethernet-phy@0ethernet-phy-ieee802.3-c22TZethernet-phy@1ethernet-phy-ieee802.3-c22T[dsa@c7000000+hisilicon,hns-dsaf-v2 [6port-16rss T``ppe-basedsaf-base WjXy @ABCDEFGHIJKLMNOPQRSTUVWX      !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~      !"#$%&'()*+,-./0123456789:;<=>?@\port@0TYfiberport@1TYfiberport@4TZYcopperport@5T[Ycopperethernet@4hisilicon,hns-nic-v2\9ok@_ethernet@5hisilicon,hns-nic-v2\9ok@`ethernet@0hisilicon,hns-nic-v2\9ok@]ethernet@1hisilicon,hns-nic-v2\9ok@^infiniband@c4000000hisilicon,hns-roce-v1T@]^_`%\1+ a5;hns-roce-comp-0hns-roce-comp-1hns-roce-comp-2hns-roce-comp-3hns-roce-comp-4hns-roce-comp-5hns-roce-comp-6hns-roce-comp-7hns-roce-comp-8hns-roce-comp-9hns-roce-comp-10hns-roce-comp-11hns-roce-comp-12hns-roce-comp-13hns-roce-comp-14hns-roce-comp-15hns-roce-comp-16hns-roce-comp-17hns-roce-comp-18hns-roce-comp-19hns-roce-comp-20hns-roce-comp-21hns-roce-comp-22hns-roce-comp-23hns-roce-comp-24hns-roce-comp-25hns-roce-comp-26hns-roce-comp-27hns-roce-comp-28hns-roce-comp-29hns-roce-comp-30hns-roce-comp-31hns-roce-asynchns-roce-commonsas@c3000000hisilicon,hip07-sas-v2TKP TXi `xZ08@ b@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~YZ[\]^_`abcdefghijklmnopqrstuvwx 9disabledsas@a2000000hisilicon,hip07-sas-v2TKP Tci xZ @ d@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_9oksas@a3000000hisilicon,hip07-sas-v2TKP Tci xZp @ e     `abcdefghijklmnopqrstuvwxyz{|}~ 9disabledpcie@a00a0000hisilicon,hip07-pcie-ecam T S+Hpci@8pffff9okmemory@0HmemoryT@wdistance-mapnuma-distance-map-v1    aliases/soc/uart@602b0000chosen#serial0:115200n8 compatibleinterrupt-parent#address-cells#size-cellsmodelmethodcpudevice_typeregenable-methodnext-level-cachenuma-node-idphandle#interrupt-cellsrangesinterrupt-controller#redistributor-regionsredistributor-strideinterruptsmsi-controller#msi-cellsmsi-parentnum-pinscurrent-speedreg-io-widthstatusdma-coherentsubctrl-vbasemodereg-namessubctrl-sysconreset-field-offsetdesc-numbuf-sizeserdes-sysconport-rst-offsetport-mode-offsetmc-mac-maskmedia-typephy-handleae-handleport-idx-in-aelocal-mac-addresseth-handledsaf-handlenode-guidinterrupt-namessas-addrhisilicon,sas-sysconctrl-reset-regctrl-reset-sts-regctrl-clock-ena-regqueue-countphy-counthip06-sas-v2-quirk-amtbus-rangemsi-mapmsi-map-maskinterrupt-map-maskinterrupt-mapdistance-matrixserial0stdout-path