e8$(A:rockchip,rk3399-evbrockchip,rk3399google,rk3399evb-rev2 +!7Rockchip RK3399 Evaluation Boardaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/serial@ff180000|/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53arm,armv8pscidcpu@1cpuarm,cortex-a53arm,armv8pscidcpu@2cpuarm,cortex-a53arm,armv8pscidcpu@3cpuarm,cortex-a53arm,armv8pscidcpu@100cpuarm,cortex-a72arm,armv8psci cpu@101cpuarm,cortex-a72arm,armv8psci display-subsystemrockchip,display-subsystem pmu_a53arm,cortex-a53-pmu pmu_a72arm,cortex-a72-pmu psci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6.xin24mAamba simple-bus+Ndma-controller@ff6d0000arm,pl330arm,primecellm@ U `apb_pclkedma-controller@ff6e0000arm,pl330arm,primecelln@ U `apb_pclkpcie@f8000000rockchip,rk3399-pcie laxi-baseapb-base+v G`aclkaclk-perfhclkpm0123syslegacyclient`     ,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38N8( coremgmtmgmt-stickypipepmpclkaclk disabled  (2default@interrupt-controllerJv ethernet@fe300000rockchip,rk3399-gmac0 macirq8ighfjfM`stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac_  stmmacethmokayzinputrgmii2default@  'P(dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@р M`biuciuciu-driveciu-sample_y reset disableddwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@Aр L`biuciuciu-driveciu-sample_z reset disabledsdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 (zN> N`clk_xinclk_ahb.emmc_cardclockA phy_arasan_Sokaydn}dusb@fe380000 generic-ehci8`usbhostarbiterutmiusbokayusb@fe3a0000 generic-ohci:`usbhostarbiterutmiusbokayusb@fe3c0000 generic-ehci<`usbhostarbiterutmiusbokayusb@fe3e0000 generic-ohci> `usbhostarbiterutmiusbokayusb@fe800000rockchip,rk3399-dwc3+N $`ref_clksuspend_clkbus_clkgrf_clk disabledusb@fe800000 snps,dwc3iotg usb2-phy utmi_wide) disabledusb@fe900000rockchip,rk3399-dwc3+N $`ref_clksuspend_clkbus_clkgrf_clk disabledusb@fe900000 snps,dwc3notg usb2-phy utmi_wide) disabledinterrupt-controller@fee00000 arm,gic-v3v+NJP  interrupt-controller@fee20000arm,gic-v3-itsKppi-partitionsinterrupt-partition-0Z interrupt-partition-1Z saradc@ff100000rockchip,rk3399-saradc>cPe`saradcapb_pclk  saradc-apb disabledi2c@ff110000rockchip,rk3399-i2czA> AU `i2cpclk;2default@+ disabledi2c@ff120000rockchip,rk3399-i2czB> BV `i2cpclk#2default@+ disabledi2c@ff130000rockchip,rk3399-i2czC> CW `i2cpclk"2default@ + disabledi2c@ff140000rockchip,rk3399-i2czD> DX `i2cpclk&2default@!+ disabledi2c@ff150000rockchip,rk3399-i2czE> EY `i2cpclk%2default@"+ disabledi2c@ff160000rockchip,rk3399-i2czF> FZ `i2cpclk$2default@#+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ``baudclkapb_pclkcu2default@$ disabledserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRa`baudclkapb_pclkbu2default@% disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSb`baudclkapb_pclkdu2default@&okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTc`baudclkapb_pclkeu2default@' disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[`spiclkapb_pclkD2default@()*++ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\`spiclkapb_pclk52default@,-./+ disabledspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]`spiclkapb_pclk42default@0123+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^`spiclkapb_pclkC2default@4567+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_`spiclkapb_pclk2default@89:;_+ disabledthermal-zonescpud<tripscpu_alert0ppassive=cpu_alert1$passive>cpu_crits criticalcooling-mapsmap0= map1>gpud<tripsgpu_alert0$passive?gpu_crits criticalcooling-mapsmap0? tsadc@ff260000rockchip,rk3399-tsadc&azO> qOd`tsadcapb_pclk  tsadc-apbms2initdefaultsleep@@A @ disabled<qos@ffa58000syscon Iqos@ffa5c000syscon Jqos@ffa60080syscon qos@ffa60100syscon qos@ffa60180syscon qos@ffa70000syscon qos@ffa70080syscon qos@ffa74000syscon@ Kqos@ffa76000syscon` Lqos@ffa90000syscon Mqos@ffa98000syscon Bqos@ffaa0000syscon Nqos@ffaa0080syscon Oqos@ffaa8000syscon Pqos@ffaa8080syscon Qqos@ffab0000syscon Cqos@ffab0080syscon Dqos@ffab8000syscon Eqos@ffac0000syscon Fqos@ffac0080syscon Gqos@ffac8000syscon Rqos@ffac8080syscon Sqos@ffad0000syscon Tqos@ffad8080syscon qos@ffae0000syscon Hpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller,+pd_iep@34"@Bpd_rga@33!@CDpd_vcodec@31@Epd_vdu@32 @FGpd_gpu@35#@Hpd_edp@25lpd_emmc@23@Ipd_gmac@22f@Jpd_sd@27L@Kpd_sdioaudio@28@Lpd_vio@15+pd_hdcp@21r@Mpd_isp0@19@NOpd_isp1@20@PQpd_tcpc0@RK3399_PD_TCPC0~}pd_tcpc1@RK3399_PD_TCPC1 pd_vo@16+pd_vopb@17@RSpd_vopl@18@Tsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2+bio-domains&rockchip,rk3399-pmu-io-voltage-domain disabledspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5UU`spiclkapb_pclk<2default@VWXY+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7UU"`baudclkapb_pclkfu2default@Z disabledi2c@ff3c0000rockchip,rk3399-i2c<zU > U U `i2cpclk92default@[+ disabledi2c@ff3d0000rockchip,rk3399-i2c=zU > U U `i2cpclk82default@\+ disabledi2c@ff3e0000rockchip,rk3399-i2c>zU > U U `i2cpclk:2default@]+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmBG2default@^U`pwmokay~pwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmBG2default@_U`pwm disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB G2default@`U`pwmokaypwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0G2default@aU`pwmokayiommu@ff650800rockchip,iommue@svpu_mmuR disablediommu@ff660480rockchip,iommu f@f@u vdec_mmuR disablediommu@ff670800rockchip,iommug@*iep_mmuR disabledrga@ff680000rockchip,rk3399-rgah7m`aclkhclksclkjgi  coreaxiahb_!efuse@ff690000rockchip,rk3399-efusei+} `pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cpmu-clock-controller@ff750000rockchip,rk3399-pmucruumbA_zU>(JUclock-controller@ff760000rockchip,rk3399-cruvmA_`z@BC0>#g/;рxh<4`#Fsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domain disabledusb2-phy@e450rockchip,rk3399-usb2phyP{`phyclkA.clk_usbphy0_480mokayhost-portl linestateokaycotg-portl0ghjotg-bvalidotg-idlinestate disabledusb2-phy@e460rockchip,rk3399-usb2phy`|`phyclkA.clk_usbphy1_480mokayhost-portl linestateokaycotg-portl0lmootg-bvalidotg-idlinestate disabledphy@f780rockchip,rk3399-emmc-phy$d`emmcclklokaypcie-phyrockchip,rk3399-pcie-phy`refclkl phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}`tcpdcoretcpdphy-refz~>_L uphyuphy-pipeuphy-tcphym w    disableddp-portlusb3-portlphy@ff800000rockchip,rk3399-typec-phy`tcpdcoretcpdphy-refz>_ M uphyuphy-pipeuphy-tcphym w    disableddp-portlusb3-portlwatchdog@ff848000 snps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ `pclktimerspdif@ff870000rockchip,rk3399-spdifBetx `mclkhclkU2default@f_ disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2sm'eetxrx`i2s_clki2s_hclkV2default@g_ disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(eetxrx`i2s_clki2s_hclkW2default@h_ disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)eetxrx`i2s_clki2s_hclkX_ disabledvop@ff8f0000rockchip,rk3399-vop-lit>wz>ׄ`aclk_vopdclk_vophclk_vopi_  axiahbdclk disabledport+ endpoint@0jtendpoint@1kwendpoint@2lriommu@ff8f3f00rockchip,iommu?w vopl_mmu `aclkhclk_R disabledivop@ff900000rockchip,rk3399-vop-big>vz>ׄ`aclk_vopdclk_vophclk_vopm_  axiahbdclk disabledport+ endpoint@0nvendpoint@1osendpoint@2pqiommu@ff903f00rockchip,iommu?v vopb_mmu `aclkhclk_R disabledmiommu@ff914000rockchip,iommu @P+ isp0_mmuR disablediommu@ff924000rockchip,iommu @P, isp1_mmuR disabledhdmi@ff940000rockchip,rk3399-dw-hdmi(tqop`iahbisfrvpllgrfcec_m disabledportsport+endpoint@0qpendpoint@1rlmipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi- po`refpclkphy_cfggrf_m disabledportsport+endpoint@0soendpoint@1tjedp@ff970000rockchip,rk3399-edp jl`dppclk2default@u_ dpm disabledports+port@0+endpoint@0vnendpoint@1wkgpu@ff9a0000#rockchip,rk3399-maliarm,mali-t8600 gpujobmmu_# disabledpinctrlrockchip,rk3399-pinctrlmb+Ngpio0@ff720000rockchip,gpio-bankrU/Jvgpio1@ff730000rockchip,gpio-banksU/Jv}gpio2@ff780000rockchip,gpio-bankxP/Jvgpio3@ff788000rockchip,gpio-bankxQ/Jvgpio4@ff790000rockchip,gpio-bankyR/Jvpcfg-pull-up;{pcfg-pull-downH|pcfg-pull-noneWxpcfg-pull-none-12maWd zpcfg-pull-up-8ma;dpcfg-pull-down-4maHdpcfg-pull-up-2ma;dpcfg-pull-down-12maHd pcfg-pull-none-13maWd yclockclk-32ksxedpedp-hpdsxugmacrgmii-pinssyx x y x xxxxyyxxyyrmii-pinss x y x x xxxxyyi2c0i2c0-xfer sxx[i2c1i2c1-xfer sxxi2c2i2c2-xfer szzi2c3i2c3-xfer sxx i2c4i2c4-xfer s x x\i2c5i2c5-xfer s x x!i2c6i2c6-xfer s x x"i2c7i2c7-xfer sxx#i2c8i2c8-xfer sxx]i2s0i2s0-8ch-bussxxxxxxxxxgi2s1i2s1-2ch-busPsxxxxxhsdio0sdio0-bus1s{sdio0-bus4@s{{{{sdio0-cmds{sdio0-clksxsdio0-cds{sdio0-pwrs{sdio0-bkpwrs{sdio0-wps{sdio0-ints{sdmmcsdmmc-bus1s{sdmmc-bus4@s{ { { {sdmmc-clks xsdmmc-cmds {sdmmc-cds{sdmmc-wps{sleepap-pwroffsxddrio-pwroffsxspdifspdif-bussxfspdif-bus-1sxspi0spi0-clks{(spi0-cs0s{+spi0-cs1s{spi0-txs{)spi0-rxs{*spi1spi1-clks {,spi1-cs0s {/spi1-rxs{.spi1-txs{-spi2spi2-clks {0spi2-cs0s {3spi2-rxs {2spi2-txs {1spi3spi3-clks{Vspi3-cs0s{Yspi3-rxs{Xspi3-txs{Wspi4spi4-clks{4spi4-cs0s{7spi4-rxs{6spi4-txs{5spi5spi5-clks{8spi5-cs0s{;spi5-rxs{:spi5-txs{9tsadcotp-gpiosx@otp-outsxAuart0uart0-xfer s{x$uart0-ctssxuart0-rtssxuart1uart1-xfer s { x%uart2auart2a-xfer s{ xuart2buart2b-xfer s{xuart2cuart2c-xfer s{x&uart3uart3-xfer s{x'uart3-ctssxuart3-rtssxuart4uart4-xfer s{xZuarthdcpuarthdcp-xfer s{xpwm0pwm0-pinsx^vop0-pwm-pinsxpwm1pwm1-pinsx_vop1-pwm-pinsxpwm2pwm2-pinsx`pwm3apwm3a-pinsxapwm3bpwm3b-pinsxhdmihdmi-i2c-xfer sxxhdmi-cecsxpciepci-clkreqn-cpmsxpci-clkreqnb-cpmsxpmicpmic-int-ls{pmic-dvs2s|usb2vcc5v0-host-ensxbacklightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ } ~aexternal-gmac-clock fixed-clocksY@ .clkin_gmacAvdd-centerpwm-regulatora vdd_center 5\okayvcc3v3-sysregulator-fixed vcc3v3_sys2Z2Zvcc5v0-sysregulator-fixed vcc5v0_sysLK@LK@vcc5v0-host-regulatorregulator-fixed# 2default@ vcc5v0_host6cvcc-phy-regulatorregulator-fixedvcc_phy compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4cpudevice_typeregenable-method#cooling-cellsclocksdynamic-power-coefficientphandleportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusep-gpiosnum-lanespinctrl-namespinctrl-0interrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-deptharasan,soc-ctl-sysconassigned-clock-ratesdisable-cqe-dcmdbus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobenon-removabledr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkmsi-controlleraffinity#io-channel-cellsreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cells#power-domain-cellspm_qos#pwm-cells#iommu-cells#reset-cells#phy-cellsrockchip,typec-conn-dirrockchip,usb3tousb2-enrockchip,external-psmrockchip,pipe-statusdmasdma-namesiommusremote-endpointrockchip,disable-mmu-resetrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthrockchip,pinsbrightness-levelsdefault-brightness-levelenable-gpiospwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onenable-active-highvin-supply