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t `okay+8FUsdhci@3f2000brcm,sdhci-iprocI?  t `okay+Fchosenbserial0:115200n8aliasesn/hsls/uart@110000v/hsls/uart@100000~/hsls/uart@120000/hsls/uart@130000sdio0_vddo_ctrlregulator-gpiosdio0_vddo_ctrl_regvoltagew@2Z 32Zw@lsdio1_vddo_ctrlregulator-gpiosdio1_vddo_ctrl_regvoltagew@2Z 32Zw@l compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregenable-methodnext-level-cachephandleinterruptsranges#interrupt-cellsinterrupt-controllermsi-controller#msi-cells#global-interrupts#iommu-cells#clock-cellsclock-frequencyclocksclock-divclock-multclock-output-namesngpios#gpio-cellsgpio-controllermsi-parent#mbox-cellsdma-coherentmboxesreg-namesstatusphysphy-names#phy-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,gpio-range#pinctrl-single,gpio-range-cellspinctrl-single,pinsenet-phy-lane-swap#pwm-cellsclock-namesgpio-rangesreg-shiftnum-cs#dma-cells#dma-channels#dma-requestsiommusphy-modephy-handlebrcm,nand-has-wpnand-ecc-modenand-ecc-strengthnand-ecc-step-sizenand-bus-widthbrcm,nand-oob-sector-sizevqmmc-supplynon-removablefull-pwr-cyclemmc-ddr-1_8vstdout-pathserial0serial1serial2serial3regulator-nameregulator-typeregulator-min-microvoltregulator-max-microvoltstates