8}`(*}('firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288chosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba arm,amba-busSdma-controller@ff250000arm,pl330arm,primecell%@Z2 eapb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Z2 eapb_pclk qdisableddma-controller@ffb20000arm,pl330arm,primecell@Z2 eapb_pclkESKSreserved-memorySdma-unusable@fe000000oscillator fixed-clockxn6xin24mE K timerarm,armv7-timer0   xn6timer@ff810000rockchip,rk3288-timer  H 2 a etimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvebiuciuciu-driveciu-sample  @qokay /:DdefaultR \hdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswebiuciuciu-driveciu-sample ! @qokayu/:Ddefault R\hdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxebiuciuciu-driveciu-sample "@ qdisableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guyebiuciuciu-driveciu-sample #@qokayu/:DdefaultR\hsaradc@ff100000rockchip,saradc $2I[esaradcapb_pclkqokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARespiclkapb_pclk  txrx ,DdefaultR !"qokayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSespiclkapb_pclk txrx -DdefaultR#$%& qdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTespiclkapb_pclktxrx .DdefaultR'()* qdisabledi2c@ff140000rockchip,rk3288-i2c >ei2c2MDdefaultR+qokayi2c@ff150000rockchip,rk3288-i2c ?ei2c2ODdefaultR, qdisabledi2c@ff160000rockchip,rk3288-i2c @ei2c2PDdefaultR-qokayi2c@ff170000rockchip,rk3288-i2c Aei2c2QDdefaultR.qokayE[K[serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUebaudclkapb_pclkDdefault R/01qokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVebaudclkapb_pclkDdefaultR2qokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWebaudclkapb_pclkDdefaultR3qokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXebaudclkapb_pclkDdefaultR4qokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYebaudclkapb_pclkDdefaultR5 qdisabledthermal-zonesreserve_thermal6cpu_thermald6tripscpu_alert0ppassiveE7K7cpu_alert1$passiveE8K8cpu_crit_ criticalcooling-mapsmap07 !map18 !gpu_thermald6tripsgpu_alert0ppassiveE9K9gpu_crit_ criticalcooling-mapsmap09 !tsadc@ff280000rockchip,rk3288-tsadc( %2HZetsadcapb_pclk 0tsadc-apbDinitdefaultsleepR:<;F:Pfsqokay}E6K6ethernet@ff290000rockchip,rk3288-gmac) macirq<82fgc]Mestmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB 0stmmacethqok=inputDdefaultR>?@AB rgmii *'B@ ?CO0Xusb@ff500000 generic-ehciP 2eusbhostaDfusb qdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2eotgphostaE fusb2-phyqokayDdefaultRFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2eotgpotgx@@ aG fusb2-phyqokayusb@ff5c0000 generic-ehci\ 2eusbhost qdisabledi2c@ff650000rockchip,rk3288-i2ce <ei2c2LDdefaultRHqokayxsyr827@40silergy,syr827@vdd_cpu Pp"4,P@eEKsyr828@41silergy,syr828Avdd_gpu Ppehym8563@51haoyu,hym8563Qxxin32k&IDdefaultRJact8846@5aactive-semi,act8846ZDdefaultRKLpMregulatorsREG1vcc_ddrOOREG2vcc_io2Z2ZEKREG3vdd_logREG4vcc_20EMKMREG5 vccio_sd2Z2ZEKREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZEdKdREG9vcc_lan2Z2ZEBKBREG10vdd_10B@B@REG11vcc_18w@w@EKREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =ei2c2NDdefaultRNqokaypwm@ff680000rockchip,rk3288-pwmhDdefaultRO2^epwm qdisabledpwm@ff680010rockchip,rk3288-pwmhDdefaultRP2^epwmqokaypwm@ff680020rockchip,rk3288-pwmh DdefaultRQ2^epwm qdisabledpwm@ff680030rockchip,rk3288-pwmh0DdefaultRR2^epwm qdisabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerEVKVpd_vio 2chgfdehilkjpd_hevc 2oppd_video 2pd_gpu 2syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<Hjk$#gׄeрxhрxhEKsyscon@ff770000rockchip,rk3288-grfsysconwE<K<watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Oqokaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif ehclkmclk2TStx UDdefaultRT< qdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s USStxrxei2s_hclki2s_clk2RDdefaultRU*E qdisabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}eaclkhclksclkapb_pclk 0crypto-rstqokayvop@ff930000rockchip,rk3288-vop 2eaclk_vopdclk_vophclk_vop_V def 0axiahbdclkmWqokayportE K endpoint@0tXE\K\iommu@ff930300rockchip,iommu  vopb_mmu_V qokayEWKWvop@ff940000rockchip,rk3288-vop 2eaclk_vopdclk_vophclk_vop_V  0axiahbdclkmYqokayportE K endpoint@0tZE]K]iommu@ff940300rockchip,iommu  vopl_mmu_V qokayEYKYhdmi@ff980000rockchip,rk3288-dw-hdmi< g2hm eiahbisfr_V qokay[portsportendpoint@0t\EXKXendpoint@1t]EZKZinterrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q epclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy<qokayusb-phy0 2]ephyclkEGKGusb-phy142^ephyclkEDKDusb-phy2H2_ephyclkEEKEpinctrlrockchip,rk3288-pinctrl<Sgpio0@ff750000rockchip,gpio-banku Q2@EgKggpio1@ff780000rockchip,gpio-bankx R2Agpio2@ff790000rockchip,gpio-banky S2Bgpio3@ff7a0000rockchip,gpio-bankz T2Cgpio4@ff7b0000rockchip,gpio-bank{ U2DECKCgpio5@ff7c0000rockchip,gpio-bank| V2Egpio6@ff7d0000rockchip,gpio-bank} W2Fgpio7@ff7e0000rockchip,gpio-bank~ X2GEIKIgpio8@ff7f0000rockchip,gpio-bank Y2HEiKihdmihdmi-ddc ^^pcfg-pull-upE_K_pcfg-pull-downpcfg-pull-noneE^K^pcfg-pull-none-12ma! E`K`sleepglobal-pwroff^ddrio-pwroff^ddr0-retention_ddr1-retention_i2c0i2c0-xfer ^^EHKHi2c1i2c1-xfer ^^E+K+i2c2i2c2-xfer  ^ ^ENKNi2c3i2c3-xfer ^^E,K,i2c4i2c4-xfer ^^E-K-i2c5i2c5-xfer ^^E.K.i2s0i2s0-bus`^^^^^^EUKUsdmmcsdmmc-clk^E K sdmmc-cmd_E K sdmmc-cd_EKsdmmc-bus1_sdmmc-bus4@____EKsdmmc-pwr ^ElKlsdio0sdio0-bus1_sdio0-bus4@____EKsdio0-cmd_EKsdio0-clk^EKsdio0-cd_sdio0-wp_sdio0-pwr_sdio0-bkpwr_sdio0-int_sdio1sdio1-bus1_sdio1-bus4@____sdio1-cd_sdio1-wp_sdio1-bkpwr_sdio1-int_sdio1-cmd_sdio1-clk^sdio1-pwr _emmcemmc-clk^EKemmc-cmd_EKemmc-pwr _EKemmc-bus1_emmc-bus4@____emmc-bus8________EKspi0spi0-clk _EKspi0-cs0 _EKspi0-tx_E K spi0-rx_E!K!spi0-cs1_E"K"spi1spi1-clk _E#K#spi1-cs0 _E&K&spi1-rx_E%K%spi1-tx_E$K$spi2spi2-cs1_spi2-clk_E'K'spi2-cs0_E*K*spi2-rx_E)K)spi2-tx _E(K(uart0uart0-xfer _^E/K/uart0-cts_E0K0uart0-rts^E1K1uart1uart1-xfer _ ^E2K2uart1-cts _uart1-rts ^uart2uart2-xfer _^E3K3uart3uart3-xfer _^E4K4uart3-cts _uart3-rts ^uart4uart4-xfer  _ ^E5K5uart4-cts_uart4-rts^tsadcotp-gpio ^E:K:otp-out ^E;K;pwm0pwm0-pin^EOKOpwm1pwm1-pin^EPKPpwm2pwm2-pin^EQKQpwm3pwm3-pin^ERKRgmacrgmii-pins^^^^````^^^ ``^^E>K>rmii-pins^^^^^^^^^^phy-int _EAKAphy-pmeb_E@K@phy-rstaE?K?spdifspdif-tx ^ETKTpcfg-output-high0EaKapcfg-output-low<EbKbact8846pwr-holdaELKLpmic-vselbEKKKdvpdvp-pwr ^EpKphym8563rtc-int_EJKJkeyspwr-key_EhKhledspower-led^EkKkwork-led^EjKjusb_hosthost-vbus-drv^EmKmusbhub-rstaEFKFusb_otgotg-vbus-drv ^EoKoirir-int_EfKfdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@ecEeKeexternal-gmac-clock fixed-clockxsY@ ext_gmacE=K=io-domains"rockchip,rk3288-io-voltage-domain<GdT^eiwBir-receivergpio-ir-receiverDdefaultRf Igpio-keys gpio-keysbutton@0 g GPIO PowertDdefaultRhleds gpio-ledswork ifirefly:blue:user rc-feedbackDdefaultRjpower ifirefly:green:power default-onDdefaultRkvsys-regulatorregulator-fixedvcc_sysLK@LK@"EKsdmmc-regulatorregulator-fixed JI DdefaultRlvcc_sd2Z2ZeEKflash-regulatorregulator-fixed vcc_flashw@w@eEKusb-regulatorregulator-fixedvcc_5vLK@LK@"eEnKnusb-host-regulatorregulator-fixed JgDdefaultRm vcc_host_5vLK@LK@enusb-otg-regulatorregulator-fixed Jg DdefaultRo vcc_otg_5vLK@LK@envcc28-dvp-regulatorregulator-fixed Jg DdefaultRp vcc28_dvp**eEcKc #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplybroken-cdnon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cells#reset-cellsassigned-clock-rates#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supplygpiosgpio-key,wakeuplabellinux,codelinux,default-triggerstartup-delay-usenable-active-high