L8H(G',mundoreader,bq-curie2rockchip,rk3066a 7bq Curie 2chosenaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/dwmmc@1021c000f/dwmmc@10214000l/dwmmc@10218000r/serial@10124000z/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000memorymemory`@amba ,arm,amba-busdma-controller@20018000,arm,pl330arm,primecell @ apb_pclk))dma-controller@2001c000,arm,pl330arm,primecell @ apb_pclk disableddma-controller@20078000,arm,pl330arm,primecell @ apb_pclkoscillator ,fixed-clockn6xin24ml2-cache-controller@10138000,arm,pl310-cache!/&&scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gic;Pserial@10124000,snps,dw-apb-uart@ "akbaudclkapb_pclk@Lokayxdefaultserial@10126000,snps,dw-apb-uart` #akbaudclkapb_pclkAMokayxdefaultusb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@  usb2-phy disabledusb@101c0000 ,snps,dwc2 otghost usb2-phy disabledethernet@10204000,rockchip,rk3066-emac @< D hclkmacrefdrmii disableddwmmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciuokayxdefault   ",>Odwmmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciuokayxdefault   Z"Odwmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciu disabledpmu@20004000,rockchip,rk3066-pmusyscon @grf@20008000,syscon i2c@2002d000,rockchip,rk3066-i2c  (i2cP disabledxdefaulti2c@2002f000,rockchip,rk3066-i2c  )Qi2cokayxdefaulttps@2d-ht ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_iovioregulator@2vdd_arm '`vdd1''regulator@3vcc_ddr '`vdd2regulator@5 vcc18_cifvdig1regulator@6vdd_11vdig2regulator@7vcc_25vpllregulator@8vcc_18vdacregulator@9 vcc25_hdmi vaux1regulator@10vcca_33 vaux2regulator@11vcc_tp vaux33regulator@12 vcc28_cif vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm F disabledxdefaultpwm@20030010,rockchip,rk2928-pwm F disabledxdefaultwatchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  G disabledxdefaultpwm@20050030,rockchip,rk2928-pwm 0G disabledxdefaulti2c@20056000,rockchip,rk3066-i2c ` *Ri2c disabledxdefaulti2c@2005a000,rockchip,rk3066-i2c  +Si2c disabledxdefaulti2c@2005e000,rockchip,rk3066-i2c  4Ti2c disabledxdefaultserial@20064000,snps,dw-apb-uart @ $akbaudclkapb_pclkBNokayxdefaultserial@20068000,snps,dw-apb-uart  %akbaudclkapb_pclkCOokayxdefaultsaradc@2006c000,rockchip,saradc  GJsaradcapb_pclk disabledspi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &   txrx disabledxdefault !spi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @  txrx disabledxdefault"#$%cpus&rockchip,rk3066-smpcpu@0cpu,arm,cortex-a94&(Eag8 s 'B@V@d'cpu@1cpu,arm,cortex-a94&sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPi2s@10118000,rockchip,rk3066-i2s  xdefault())txrxi2s_hclki2s_clkKp disabledi2s@1011a000,rockchip,rk3066-i2s  xdefault*))txrxi2s_hclki2s_clkLp disabledi2s@1011c000,rockchip,rk3066-i2s  xdefault+) ) txrxi2s_hclki2s_clkMp disabledclock-controller@20000000,rockchip,rk3066a-cru timer@2000e000,snps,dw-apb-timer-osc  .VD timerpclkefuse@20010000,rockchip,rockchip-efuse @[ pclk_efusecpu_leakagetimer@20038000,snps,dw-apb-timer-osc  ,TB timerpclktimer@2003a000,snps,dw-apb-timer-osc  -UC timerpclkphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy disabledusb-phy0|Qphyclkusb-phy1Rphyclkpinctrl,rockchip,rk3066a-pinctrlgpio0@20034000,rockchip,gpio-bank @ 6U;Pgpio1@2003c000,rockchip,gpio-bank  7V;Pgpio2@2003e000,rockchip,gpio-bank  8W;Pgpio3@20080000,rockchip,gpio-bank  9X;P..gpio4@20084000,rockchip,gpio-bank @ :Y;P//gpio6@2000a000,rockchip,gpio-bank  <Z;Ppcfg_pull_default--pcfg_pull_none,,emacemac-xfer,,,,,,,,emac-mdio ,,emmcemmc-clk-emmc-cmd -emmc-rst -i2c0i2c0-xfer ,,i2c1i2c1-xfer ,,i2c2i2c2-xfer ,,i2c3i2c3-xfer ,,i2c4i2c4-xfer ,,pwm0pwm0-out,pwm1pwm1-out,pwm2pwm2-out,pwm3pwm3-out,spi0spi0-clk-spi0-cs0-!!spi0-tx-spi0-rx-  spi0-cs1-spi1spi1-clk-""spi1-cs0-%%spi1-rx-$$spi1-tx-##spi1-cs1-uart0uart0-xfer --uart0-cts-uart0-rts-uart1uart1-xfer --uart1-cts-uart1-rts-uart2uart2-xfer - -uart3uart3-xfer --uart3-cts-uart3-rts-sd0sd0-clk-sd0-cmd -  sd0-cd-  sd0-wp-sd0-bus-width1 -sd0-bus-width4@ - - - -  sd1sd1-clk-  sd1-cmd-sd1-cd-sd1-wp-sd1-bus-width1-sd1-bus-width4@----i2s0i2s0-bus-- - - - - ---((i2s1i2s1-bus`------**i2s2i2s2-bus`------++fixed-regulator,regulator-fixed sdmmc-supply--  .   gpio-keys ,gpio-keys+button@0 6<tGGPIO Key PowerM^ndbutton@1 6/<hGGPIO Key Vol-M^nd #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1device_typeregrangesinterrupts#dma-cellsclocksclock-nameslinux,phandlestatusclock-frequency#clock-cellsclock-output-namescache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaphysphy-namesrockchip,grfmax-speedphy-modefifo-depthnum-slotsvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removablevcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsdmasdma-namesenable-methodnext-level-cacheoperating-pointsclock-latencycpu0-supplyrockchip,playback-channelsrockchip,capture-channels#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsgpiostartup-delay-usvin-supplyautorepeatgpioslinux,codelabellinux,input-typegpio-key,wakeupdebounce-interval