8(Sony Xperia Z!sony,xperia-yugaqcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOKcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqO`cpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqObcpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Odcpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Ofl2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state OmemoryememoryDthermal-zonescpu-thermal0 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal1 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal2 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal3 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-pmu!qcom,krait-pmu : clockscxo_board !fixed-clockER$O0pxo_board !fixed-clockERsleep_clk !fixed-clockERO/hwmutex!qcom,sfpb-mutex b iOsmem !qcom,smemwsmd !qcom,smdmodem@0 :%  disabledq6@1 :Z  disableddsps@3 : @ disabledriva@6 :  disabledsmsm !qcom,smsm    @apps@0DOUmodem@1D :&q6@2D :Ywcnss@3D :OJdsps@4D :firmwarescm!qcom,scm-apq8064 coreiio-hwmon !iio-hwmonT'   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@3C :Odefault]O%sdc4-gpiosO@pios*ggpio63gpio64gpio65gpio66gpio67gpio68lsdc4sdcc1-pin-activeO9clk gsdc1_clkucmd gsdc1_cmdu data gsdc1_datau sdcc3-pin-activeO=clk gsdc3_clkucmd gsdc3_cmdudata gsdc3_dataups_holdOmuxggpio78lps_holdi2c1Omuxggpio20gpio21lgsbi1pinconfggpio20gpio21i2c1_pins_sleepOmuxggpio20gpio21lgpiopinconfggpio20gpio21gsbi1_uart_2pinsmuxggpio18gpio19lgsbi1gsbi1_uart_4pinsmuxggpio18gpio19gpio20gpio21lgsbi1i2c2Omuxggpio24gpio25lgsbi2pinconfggpio24gpio25i2c2_pins_sleepOmuxggpio24gpio25lgpiopinconfggpio24gpio25i2c3Omux ggpio8gpio9lgsbi3pinconf ggpio8gpio9i2c3_pins_sleepOmux ggpio8gpio9lgpiopinconf ggpio8gpio9i2c4Omuxggpio12gpio13lgsbi4pinconfggpio12gpio13i2c4_pins_sleepOmuxggpio12gpio13lgpiopinconfggpio12gpio13spi5_defaultOpinmuxggpio51gpio52gpio54lgsbi5pinmux_cslgpioggpio53pinconfggpio51gpio52gpio54pinconf_csggpio53spi5_sleepO pinmuxlgpioggpio51gpio52gpio53gpio54pinconfggpio51gpio52gpio53gpio54i2c6O!muxggpio16gpio17lgsbi6pinconfggpio16gpio17i2c6_pins_sleepO"muxggpio16gpio17lgpiopinconfggpio16gpio17gsbi6_uart_2pinsmuxggpio14gpio15lgsbi6gsbi6_uart_4pinsmuxggpio14gpio15gpio16gpio17lgsbi6gsbi7_uart_2pinsmuxggpio82gpio83lgsbi7gsbi7_uart_4pinsmuxggpio82gpio83gpio84gpio85lgsbi7i2c7O#muxggpio84gpio85lgsbi7pinconfggpio84gpio85i2c7_pins_sleepO$muxggpio84gpio85lgpiopinconfggpio84gpio85riva-fm-activeggpio14gpio15lriva_fmOPriva-bt-activeggpio16gpio17lriva_btOOriva-wlan-active#ggpio64gpio65gpio66gpio67gpio68 lriva_wlanONhdmi-pinctrlOFmuxggpio70gpio71gpio72lhdmipinconf_ddcggpio70gpio71pinconf_hpdggpio72gsbi5-uart-pin-activeOrxggpio52lgsbi5txggpio51lgsbi5sdcc3-cd-pin-activeggpio26lgpioO>syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$:DRclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D Oclock-controller@20a8000!qcom,kpss-acc-v1D Oclock-controller@20b8000!qcom,kpss-acc-v1D O power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O sps-sic-non-secure@12100000!sysconDOgsbi@12440000 disabled!qcom,gsbi-v1.0.0DD iface=serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ :  coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1]OdefaultsleepDF :  coreiface disabledgsbi@12480000 disabled!qcom,gsbi-v1.0.0DH iface=i2c@124a0000!qcom,i2c-qup-v1.1.1DJ]Odefaultsleep :  coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0D  iface=i2c@16280000!qcom,i2c-qup-v1.1.1]OdefaultsleepD( :  coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0D0 iface=i2c@16380000!qcom,i2c-qup-v1.1.1]OdefaultsleepD8 :  coreiface disabledgsbi@1a200000ok!qcom,gsbi-v1.0.0D  iface=serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  :  coreifaceokOdefault]spi@1a280000!qcom,spi-qup-v1.1.1D( :] Odefaultsleep  coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0DP iface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP :  coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1]!"OdefaultsleepDX :  coreiface disabledgsbi@16600000 disabled!qcom,gsbi-v1.0.0D` iface=serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` :  coreiface disabledi2c@16680000!qcom,i2c-qup-v1.1.1]#$OdefaultsleepDh :  coreiface disabledrng@1a500000 !qcom,prngDP coressbi@c00000 !qcom,ssbiD pmic-arbiterpmic@1 !qcom,pm8821,%:Lmpps@50!qcom,pm8821-mppqcom,ssbi-mppDP :3Cqcom,ssbi@500000 !qcom,ssbiDP pmic-arbiterpmic@0 !qcom,pm8921,%:JO'gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP3&,CO&gpio-keys-pin-activeggpio3gpio4gpio29gpio35lnormal(8ERfOhmpps@50!qcom,pm8921-mppqcom,ssbi-mppDP3C`:rtc@11d!qcom,pm8921-rtc,':'D|pwrkey@1c!qcom,pm8921-pwrkeyD,':23= xoadc@197!qcom,pm8921-adcD 'NOadc-channel@00Dadc-channel@01Dadc-channel@02Dadc-channel@04Dadc-channel@08Dadc-channel@09D adc-channel@0aD adc-channel@0bD adc-channel@0cD adc-channel@0dD adc-channel@0eDadc-channel@0fDqfprom@700000 !qcom,qfpromDp=calibDO(backup_calibDO)clock-controller@900000!qcom,gcc-apq8064D@()calibcalib_backupEO clock-controller@28000000!qcom,lcc-apq8064D(Eclock-controller@4000000!qcom,mmcc-apq8064DEOAclock-controller@2011000!sysconDOrpm@108000!qcom,rpm-apq8064D $:ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccEOregulators!qcom,rpm-pm8921-regulators *#*8*M+\*l,{,--s1((0O,s2  jOQs3 0I>OLs4w@w@jO*s7  0O-s8!!jl1l2OOl3..O2l4w@w@O3l5-p-pO;l6-p-pO+l7:-pl8**l9--l10,@ ,@ ORl11--l12OOl14w@w@l15w@-pl16**l17l18OOl21l22'@'@l23w@w@l24 q0OMl25l26l27l28l29lvs1lvs2OSlvs3lvs4lvs5lvs6lvs7usb-switchhdmi-switchncpw@w@jusb@12500000 !qcom,ci-hdrcDPP :d ~ coreiface '< @CcoreOulpiXi.nusb-phyokayxotgO1ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<1Cpor23O.usb@12520000 !qcom,ci-hdrcDRR : ) ' coreiface )'< dCcoreOulpiXi4nusb-phy disabledO5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<5CporO4usb@12530000 !qcom,ci-hdrcDSS : , * coreiface ,'< eCcoreOulpiXi6nusb-phy disabledO7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy/0 sleepref<7CporO6phy@1b400000!qcom,apq8064-sata-phy disabledD@phy_mem -cfgO8sata@29000000!qcom,apq8064-ahcigeneric-ahci disabledD) :( ; . )slave_ifaceifacebusrxoobcore_pmalive 'i8 nsata-phydma@12402000!qcom,bam-v1.3.0D@  :b nbam_clkO:dma@12182000!qcom,bam-v1.3.0D  :` pbam_clkO<dma@121c2000!qcom,bam-v1.3.0D  :_ qbam_clkO?amba !simple-bus=sdcc@12400000okay!arm,pl18xarm,primecellOdefault]9D@  :hcmd_irq x nmclkapb_pclk 2::7txrxA;M*sdcc@12180000!arm,pl18xarm,primecellokayD  :fcmd_irq z pmclkapb_pclk  qZ2<<7txrxA+ c%Odefault]=>sdcc@121c0000!arm,pl18xarm,primecell disabledD  :ecmd_irq { qmclkapb_pclk l2??7txrxOdefault]@syscon@1a400000!qcom,tcsr-apq8064sysconD@Oadreno-3xx@4300000!qcom,adreno-3xxD0kgsl_3d0_reg_memory :P kgsl_3d0_irq)core_clkiface_clkmem_clkmem_iface_clk AGAA!AlxBBBBBBBBBB B B B B BBBBBBBBBBBBBBBBBBCCCCCCCCCC C C C C CCCCCCCCCCCCCCCCCCqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0tqcom,gpu-pwrlevel@1syscon@5700000!sysconDppOEmdss_dsi@4700000!qcom,mdss-dsi-ctrlMDSS DSI CTRL->0 :RDp dsi_ctrl8AAAA9ATAjAXDiface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ASAWA8Ai DDDDEiDportsport@0Dendpointport@1Dendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960EDppp\"dsi_plldsi_phydsi_phy_regulatoriface_clkref A0ODiommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkA ADP:?@OHiommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkA AD`:=>OIiommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkA A!D:EFOBiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkA A!D:OCpci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `dbielbiparfconfigepci0= :msi$%&' + . -coreifacephy(< l k j i hCaxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960Odefault]FDcore_physical :OA>A A*core_clkmaster_iface_clkslave_iface_clkiG nhdmi-phyportsport@0Dendpointport@1Dendpointhdmi-phy@4a00400!qcom,hdmi-phy-8960D`hdmi_phyhdmi_pllAslave_iface_clkOGmdp@5100000 !qcom,mdp4D :K0AMAAANA_A`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk xHHIIportsport@0Dendpointport@1Dendpointport@2Dendpointport@3Dendpointriva-pil@3204000!qcom,riva-pilD   @ ccudxepmuJ wdogfatalwKLM,*okayOdefault ]NOPOTiris !qcom,wcn36600xo93FQTRaSsmd-edge : rivawcnss !qcom,wcnss oWCNSS_CTRLTbt!qcom,wcnss-btwifi!qcom,wcnss-wlan:txrxU U tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecellD apb_pclkin-portsportendpointVOXtpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpointWOYreplicator !arm,coresight-static-replicator apb_pclkout-portsport@0DendpointXOVport@1DendpointYOWin-portsportendpointZO_funnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0Dendpoint[Oaport@1Dendpoint\Ocport@4Dendpoint]Oeport@5Dendpoint^Ogout-portsportendpoint_OZetm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclk`out-portsportendpointaO[etm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkbout-portsportendpointcO\etm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclkdout-portsportendpointeO]etm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclkfout-portsportendpointgO^aliases#/soc/gsbi@1a200000/serial@1a240000chosenserial0:115200n8gpio-keys !gpio-keys gpio-keysOdefault]hcamera-focus camera_focus f&camera-snapshotcamera_snapshot f&volume-down volume_down f&rvolume-up volume_up f&#s #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrpinctrl-1qcom,modeqcom,controller-typegpio-rangesdrive-push-pullinput-enablepower-sourceqcom,drive-strengthqcom,pull-up-strengthallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_l1_l2_l12_l18-supplyvin_lvs_1_3_6-supplyvin_lvs_4_5_7-supplyvin_ncp-supplyvin_lvs2-supplyvin_l24-supplyvin_l25-supplyvin_l27-supplyvin_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-modeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesremote-endpointcpuserial0stdout-pathinput-namelinux,input-typelinux,code