Ð þí9ê85¼(.5„xlnx,zynq-zc702xlnx,zynq-7000&Xilinx ZC702 boardcpuscpu@0arm,cortex-a9,cpu8<CèQ] ,+B@B@ncpu@1arm,cortex-a9,cpu8<nfpga-full fpga-regionvpmu@f8891000arm,cortex-a9-pmu†‘8ø‰ø‰0fixedregulatorregulator-fixed¢VCCPINT±B@ÉB@áónreplicator arm,coresight-static-replicator<./apb_pclkdbg_trcdbg_apbout-portsport@08endpointnport@18endpointnin-portsportendpointnamba simple-bus‘adc@f8007100xlnx,zynq-xadc-1.00.a8øq  †‘< can@e0008000xlnx,zynq-can-1.0#okay<$ can_clkpclk8à€ †‘*@8@FdefaultTcan@e0009000xlnx,zynq-can-1.0 #disabled<% can_clkpclk8à †3‘*@8@gpio@e000a000xlnx,zynq-gpio-1.0^<*jz‘ †8à FdefaultT ni2c@e0004000cdns,i2c-r1p10#okay<&‘ †8à@ €FdefaultT i2c-mux@74 nxp,pca95488ti2c@08clock-generator@5d° silabs,si570½28]Ó P/ Ùî i2c@18hdmi-tx@39 adi,adv751189àðyuv4221x%righti2c@28eeprom@54 atmel,24c088Ti2c@38gpio@21 ti,tca64168!j^i2c@48rtc@51 nxp,pcf85638Qi2c@78hwmon@34 ti,ucd924884hwmon@35 ti,ucd924885hwmon@36 ti,ucd924886i2c@e0005000cdns,i2c-r1p10 #disabled<'‘ †08àPinterrupt-controller@f8f01000arm,cortex-a9-gicz8øðøðncache-controller@f8f02000arm,pl310-cache8øð  † = N^lmemory-controller@f8006000xlnx,zynq-ddrc-a058ø`serial@e0000000xlnx,xuartpscdns,uart-r1p8 #disabled<(uart_clkpclk8à †serial@e0001000xlnx,xuartpscdns,uart-r1p8#okay<)uart_clkpclk8à †2FdefaultT spi@e0006000xlnx,zynq-spi-r1p68à` #disabled‘ †<" ref_clkpclkspi@e0007000xlnx,zynq-spi-r1p68àp #disabled‘ †1<# ref_clkpclkethernet@e000b000cdns,zynq-gemcdns,gem8à°#okay †< pclkhclktx_clk xrgmii-id FdefaultT ethernet-phy@78 ,ethernet-phyn ethernet@e000c000cdns,zynq-gemcdns,gem8àÀ #disabled †-<pclkhclktx_clkmmc@e0100000arasan,sdhci-8.9a#okayclk_xinclk_ahb< ‘ †8àFdefaultTmmc@e0101000arasan,sdhci-8.9a #disabledclk_xinclk_ahb<!‘ †/8àslcr@f8000000!xlnx,zynq-slcrsysconsimple-mfd8ønclkc@100°xlnx,ps7-clkcŒj˜armpllddrplliopllcpu_6or4xcpu_3or2xcpu_2xcpu_1xddr2xddr3xdcilqspismcpcapgem0gem1fclk0fclk1fclk2fclk3can0can1sdio0sdio1uart0uart1spi0spi1dmausb0_aperusb1_apergem0_apergem1_apersdio0_apersdio1_aperspi0_aperspi1_apercan0_apercan1_aperi2c0_aperi2c1_aperuart0_aperuart1_apergpio_aperlqspi_apersmc_aperswdtdbg_trcdbg_apb8«ü Unrstc@200xlnx,zynq-reset8H¼Épinctrl@700xlnx,pinctrl-zynq8Écan0-defaultnmuxÐcan0 Ùcan0_9_grpconf Ùcan0_9_grpàêconf-rxöMIO46ûconf-txöMIO47gem0-defaultn mux Ðethernet0Ùethernet0_0_grpconfÙethernet0_0_grpàêconf-rx$öMIO22MIO23MIO24MIO25MIO26MIO27ûconf-tx$öMIO16MIO17MIO18MIO19MIO20MIO21.mux-mdioÐmdio0 Ùmdio0_0_grpconf-mdio Ùmdio0_0_grpàêgpio0-defaultn muxÐgpio0eÙgpio0_7_grpgpio0_8_grpgpio0_9_grpgpio0_10_grpgpio0_11_grpgpio0_12_grpgpio0_13_grpgpio0_14_grpconfeÙgpio0_7_grpgpio0_8_grpgpio0_9_grpgpio0_10_grpgpio0_11_grpgpio0_12_grpgpio0_13_grpgpio0_14_grpàêconf-pull-up#öMIO9MIO10MIO11MIO12MIO13MIO14?conf-pull-none öMIO7MIO8i2c0-defaultn mux Ùi2c0_10_grpÐi2c0conf Ùi2c0_10_grp?àêsdhci0-defaultnmux Ùsdio0_2_grpÐsdio0conf Ùsdio0_2_grpàêmux-cd Ùgpio0_0_grp Ðsdio0_cdconf-cd Ùgpio0_0_grpû?àêmux-wp Ùgpio0_15_grp Ðsdio0_wpconf-wp Ùgpio0_15_grpû?àêuart1-defaultn mux Ùuart1_10_grpÐuart1conf Ùuart1_10_grpàêconf-rxöMIO49ûconf-txöMIO48usb0-defaultnmux Ùusb0_0_grpÐusb0conf Ùusb0_0_grpàêconf-rxöMIO29MIO31MIO36ûconf-tx6öMIO28MIO30MIO32MIO33MIO34MIO35MIO37MIO38MIO39dmac@f8003000arm,pl330arm,primecell8ø0‘.Labortdma0dma1dma2dma3dma4dma5dma6dma7l† ()*+\gu< apb_pclkdevcfg@f8007000xlnx,zynq-devcfg-1.08øp‘ †< ref_clkÉntimer@f8f00200arm,cortex-a9-global-timer8øð  † ‘<timer@f8001000‘$†    cdns,ttc<8øtimer@f8002000‘$†%&' cdns,ttc<8ø timer@f8f00600‘ † arm,cortex-a9-twd-timer8øð <usb@e0002000"xlnx,zynq-usb-2.20achipidea,usb2#okay<‘ †8à ƒulpiŒhost”FdefaultTusb@e0003000"xlnx,zynq-usb-2.20achipidea,usb2 #disabled<‘ †,8à0ƒulpiwatchdog@f8005000<-cdns,wdt-r1p2‘ † 8øPœ etb@f8801000"arm,coresight-etb10arm,primecell8ø€<./apb_pclkdbg_trcdbg_apbin-portsportendpointntpiu@f8803000!arm,coresight-tpiuarm,primecell8ø€0<./apb_pclkdbg_trcdbg_apbin-portsportendpointnfunnel@f8804000*arm,coresight-static-funnelarm,primecell8ø€@<./apb_pclkdbg_trcdbg_apbout-portsportendpointnin-portsport@08endpointnport@18endpointnport@28endpointptm@f889c000"arm,coresight-etm3xarm,primecell8ø‰À<./apb_pclkdbg_trcdbg_apb¨out-portsportendpointnptm@f889d000"arm,coresight-etm3xarm,primecell8ø‰Ð<./apb_pclkdbg_trcdbg_apb¨out-portsportendpointnsram@fffc0000 mmio-sram8ÿüaliases¬/amba/ethernet@e000b000¶/amba/i2c@e0004000»/amba/serial@e0001000Ã/amba/mmc@e0100000memory@0,memory8@chosenÈÑserial0:115200n8gpio-keys gpio-keysÝsw14èsw14 î ôlÿÝsw13èsw13 îôgÿÝleds gpio-ledsds23èds23 î   heartbeatphy0usb-nop-xceiv#n #address-cells#size-cellscompatiblemodeldevice_typeregclocksclock-latencycpu0-supplyoperating-pointsphandlefpga-mgrrangesinterruptsinterrupt-parentregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onclock-namesremote-endpointstatustx-fifo-depthrx-fifo-depthpinctrl-namespinctrl-0#gpio-cellsgpio-controllerinterrupt-controller#interrupt-cellsclock-frequency#clock-cellstemperature-stabilityfactory-foutadi,input-depthadi,input-colorspaceadi,input-clockadi,input-styleadi,input-justificationarm,data-latencyarm,tag-latencycache-unifiedcache-levelphy-modephy-handlefclk-enableclock-output-namesps-clk-frequency#reset-cellssysconfunctiongroupsslew-rateio-standardpinsbias-high-impedancebias-disablelow-power-disablelow-power-enablebias-pull-upinterrupt-names#dma-cells#dma-channels#dma-requestsphy_typedr_modeusb-phytimeout-seccpuethernet0i2c0serial0mmc0bootargsstdout-pathautorepeatlabelgpioslinux,codewakeup-sourcelinux,default-trigger#phy-cells