8}(}CompuLab CM-QS600#!qcom,apq8064-cm-qs600qcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOOcpuscpu@0 !qcom,kraitWqcom,kpss-acc-v1ecpuDqO`cpu@1 !qcom,kraitWqcom,kpss-acc-v1ecpuDqObcpu@2 !qcom,kraitWqcom,kpss-acc-v1ecpuDq Odcpu@3 !qcom,kraitWqcom,kpss-acc-v1ecpuDq  Ofl2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state OmemoryememoryDthermal-zonescpu-thermal0 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal1 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal2 tripstrip0#$/lpassivetrip1#/ lcriticalcpu-thermal3 ltripstrip0#$/lpassivetrip1#/ lcriticalcpu-pmu!qcom,krait-pmu : clockscxo_board !fixed-clockER$O/pxo_board !fixed-clockERsleep_clk !fixed-clockERO.hwmutex!qcom,sfpb-mutex b iOsmem !qcom,smemwsmd !qcom,smdmodem@0 :%  disabledq6@1 :Z  disableddsps@3 : @ disabledriva@6 :  disabledsmsm !qcom,smsm    @apps@0DOUmodem@1D :&q6@2D :Ywcnss@3D :ONdsps@4D :firmwarescm!qcom,scm-apq8064 coreiio-hwmon !iio-hwmonT'   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@3CZO :[defaultiOsdc4-gpiosO@pios*sgpio63gpio64gpio65gpio66gpio67gpio68xsdc4sdcc1-pin-activeO9clk ssdc1_clkcmd ssdc1_cmd data ssdc1_data sdcc3-pin-activeclk ssdc3_clkcmd ssdc3_cmddata ssdc3_dataps_holdOmuxsgpio78xps_holdi2c1Omuxsgpio20gpio21xgsbi1pinconfsgpio20gpio21i2c1_pins_sleepOmuxsgpio20gpio21xgpiopinconfsgpio20gpio21gsbi1_uart_2pinsmuxsgpio18gpio19xgsbi1gsbi1_uart_4pinsmuxsgpio18gpio19gpio20gpio21xgsbi1i2c2Omuxsgpio24gpio25xgsbi2pinconfsgpio24gpio25i2c2_pins_sleepOmuxsgpio24gpio25xgpiopinconfsgpio24gpio25i2c3Omux sgpio8gpio9xgsbi3pinconf sgpio8gpio9i2c3_pins_sleepOmux sgpio8gpio9xgpiopinconf sgpio8gpio9i2c4Omuxsgpio12gpio13xgsbi4pinconfsgpio12gpio13i2c4_pins_sleepOmuxsgpio12gpio13xgpiopinconfsgpio12gpio13spi5_defaultOpinmuxsgpio51gpio52gpio54xgsbi5pinmux_csxgpiosgpio53pinconfsgpio51gpio52gpio54pinconf_cssgpio53spi5_sleepO pinmuxxgpiosgpio51gpio52gpio53gpio54pinconfsgpio51gpio52gpio53gpio54i2c6O!muxsgpio16gpio17xgsbi6pinconfsgpio16gpio17i2c6_pins_sleepO"muxsgpio16gpio17xgpiopinconfsgpio16gpio17gsbi6_uart_2pinsmuxsgpio14gpio15xgsbi6gsbi6_uart_4pinsmuxsgpio14gpio15gpio16gpio17xgsbi6gsbi7_uart_2pinsO#muxsgpio82gpio83xgsbi7gsbi7_uart_4pinsmuxsgpio82gpio83gpio84gpio85xgsbi7i2c7O$muxsgpio84gpio85xgsbi7pinconfsgpio84gpio85i2c7_pins_sleepO%muxsgpio84gpio85xgpiopinconfsgpio84gpio85riva-fm-activesgpio14gpio15xriva_fmriva-bt-activesgpio16gpio17xriva_btriva-wlan-active#sgpio64gpio65gpio66gpio67gpio68 xriva_wlanhdmi-pinctrlOJmuxsgpio70gpio71gpio72xhdmipinconf_ddcsgpio70gpio71pinconf_hpdsgpio72card_detectO>muxsgpio26xgpiopcie_pinmuxOImuxsgpio27xgpioconfsgpio27 syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$:DRclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D Oclock-controller@20a8000!qcom,kpss-acc-v1D Oclock-controller@20b8000!qcom,kpss-acc-v1D O power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O sps-sic-non-secure@12100000!sysconDOgsbi@12440000okay!qcom,gsbi-v1.0.0DD iface=serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ :  coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1i [defaultsleepDF :  coreifaceokayR @eeprom@50 !atmel,24c02DP gsbi@12480000 disabled!qcom,gsbi-v1.0.0DH iface=i2c@124a0000!qcom,i2c-qup-v1.1.1DJi [defaultsleep :  coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0D  iface=i2c@16280000!qcom,i2c-qup-v1.1.1i [defaultsleepD( :  coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0D0 iface=i2c@16380000!qcom,i2c-qup-v1.1.1i [defaultsleepD8 :  coreiface disabledgsbi@1a200000 disabled!qcom,gsbi-v1.0.0D  iface=serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  :  coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1D( :i [defaultsleep  coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0DP iface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP :  coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1i! "[defaultsleepDX :  coreiface disabledgsbi@16600000ok!qcom,gsbi-v1.0.0D` iface=serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` :  coreifaceok[defaulti#i2c@16680000!qcom,i2c-qup-v1.1.1i$ %[defaultsleepDh :  coreiface disabledrng@1a500000 !qcom,prngDP coressbi@c00000 !qcom,ssbiD pmic-arbiterpmic@1 !qcom,pm8821,:Lmpps@50!qcom,pm8821-mppqcom,ssbi-mppDP :3Oqcom,ssbi@500000 !qcom,ssbiDP pmic-arbiterpmic@0 !qcom,pm8921,:JO'gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP3C&,OO&wlan-gpiosOhpiossgpio43xnormal1mpps@50!qcom,pm8921-mppqcom,ssbi-mppDP3O`:rtc@11d!qcom,pm8921-rtc,':'D>pwrkey@1c!qcom,pm8921-pwrkeyD,':23M= xoadc@197!qcom,pm8921-adcD V'NjOadc-channel@00Dadc-channel@01Dadc-channel@02Dadc-channel@04Dadc-channel@08Dadc-channel@09D adc-channel@0aD adc-channel@0bD adc-channel@0cD adc-channel@0dD adc-channel@0eDadc-channel@0fDqfprom@700000 !qcom,qfpromDp=calibDO(backup_calibDO)clock-controller@900000!qcom,gcc-apq8064D@|()calibcalib_backupEO clock-controller@28000000!qcom,lcc-apq8064D(Eclock-controller@4000000!qcom,mmcc-apq8064DEOBclock-controller@2011000!sysconDOrpm@108000!qcom,rpm-apq8064D $:ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccEOregulators!qcom,rpm-pm8921-regulators*+**+,+;,J,Y,s1h|((0O+s2OQs3|B@\I>OGs4|w@w@0O*s7|  0O,s8l1l2l3|.2ZO1l4|B@w@O2l5|)0-O;l6l7l8l9l10ORl11l12l14l15l16l17l18l21l22l23|O5l24OPl25l26l27l28l29lvs1lvs2OSlvs3lvs4lvs5lvs6OHlvs7usb-switchhdmi-switchncpusb@12500000 !qcom,ci-hdrcDPP :d ~ coreiface  @coreulpi-usb-phyok(otgO0ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy./ sleepref0por0;1G2O-usb@12520000 !qcom,ci-hdrcDRR : ) ' coreiface ) dcoreulpi3usb-phyokay(hostO4ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy0./ sleepref4por;1G5O3usb@12530000 !qcom,ci-hdrcDSS : , * coreiface , ecoreulpi6usb-phyokay(hostO7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy0./ sleepref7por;1G5O6phy@1b400000!qcom,apq8064-sata-phy disabledD@Sphy_mem -cfg0O8sata@29000000!qcom,apq8064-ahcigeneric-ahci disabledD) :( ; . )slave_ifaceifacebusrxoobcore_pmalive 8 sata-phy]dma@12402000!qcom,bam-v1.3.0D@  :b nbam_clkozO:dma@12182000!qcom,bam-v1.3.0D  :` pbam_clkozO<dma@121c2000!qcom,bam-v1.3.0D  :_ qbam_clkozO?amba !simple-bus=sdcc@12400000okay!arm,pl18xarm,primecell[defaulti9D@  :hcmd_irq x nmclkapb_pclk::txrx;*sdcc@12180000!arm,pl18xarm,primecellokayD  :fcmd_irq z pmclkapb_pclk q <<txrx=[defaulti> sdcc@121c0000!arm,pl18xarm,primecellokayD  :ecmd_irq { qmclkapb_pclkl??txrx[defaulti@==Asyscon@1a400000!qcom,tcsr-apq8064sysconD@Oadreno-3xx@4300000!qcom,adreno-3xxD0Skgsl_3d0_reg_memory :P kgsl_3d0_irq)core_clkiface_clkmem_clkmem_iface_clk BGBB!B'3CCCCCCCCCC C C C C CCCCCCCCCCCCCCCCCCDDDDDDDDDD D D D D DDDDDDDDDDDDDDDDDDqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0:tqcom,gpu-pwrlevel@1:syscon@5700000!sysconDppOFmdss_dsi@4700000!qcom,mdss-dsi-ctrlHMDSS DSI CTRL->0 :RDp Sdsi_ctrl8BBBB9BTBjBXDiface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk BSBWB8Bi NEEEEeFEportsport@0Dendpointport@1Dendpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960E0Dppp\"Sdsi_plldsi_phydsi_phy_regulatoriface_clkref B/OEiommu@7500000!qcom,apq8064-iommuqsmmu_pclkiommu_clkB BDP:?@~OLiommu@7600000!qcom,apq8064-iommuqsmmu_pclkiommu_clkB BD`:=>~OMiommu@7c00000!qcom,apq8064-iommuqsmmu_pclkiommu_clkB B!D:EF~OCiommu@7d00000!qcom,apq8064-iommuqsmmu_pclkiommu_clkB B!D:~ODpci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `Sdbielbiparfconfigepci0= :msi$%&' + . -coreifacephy( l k j i haxiahbporpciphyokGH=iI[default hdmi-tx@4a00000!qcom,hdmi-tx-8960[defaultiJDScore_physical :OB>B B*core_clkmaster_iface_clkslave_iface_clkK hdmi-phyportsport@0Dendpointport@1Dendpointhdmi-phy@4a00400!qcom,hdmi-phy-8960D`Shdmi_phyhdmi_pllBslave_iface_clk0OKmdp@5100000 !qcom,mdp4D :K0BMBBBNB_B`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk 3LLMMportsport@0Dendpointport@1Dendpointport@2Dendpointport@3Dendpointriva-pil@3204000!qcom,riva-pilD   @ SccudxepmuVN wdogfatalwOGP!* disabledOTiris !qcom,wcn3660/xo.2;QIRVSsmd-edge : Hrivawcnss !qcom,wcnss dWCNSS_CTRLvTbt!qcom,wcnss-btwifi!qcom,wcnss-wlan:txrxU U tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecellD apb_pclkin-portsportendpointVOXtpiu@1a03000!!arm,coresight-tpiuarm,primecellD0 apb_pclkin-portsportendpointWOYreplicator !arm,coresight-static-replicator apb_pclkout-portsport@0DendpointXOVport@1DendpointYOWin-portsportendpointZO_funnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@ apb_pclkin-portsport@0Dendpoint[Oaport@1Dendpoint\Ocport@4Dendpoint]Oeport@5Dendpoint^Ogout-portsportendpoint_OZetm@1a1c000"!arm,coresight-etm3xarm,primecellD apb_pclk`out-portsportendpointaO[etm@1a1d000"!arm,coresight-etm3xarm,primecellD apb_pclkbout-portsportendpointcO\etm@1a1e000"!arm,coresight-etm3xarm,primecellD apb_pclkdout-portsportendpointeO]etm@1a1f000"!arm,coresight-etm3xarm,primecellD apb_pclkfout-portsportendpointgO^v3p3!regulator-fixed PCIE V3P3|2Z2ZhO=aliases#/soc/gsbi@16600000/serial@16640000chosenserial0:115200n8pwrseq= !simple-bussdcc4_pwrseq[defaultih!mmc-pwrseq-simple &+OA #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizeqcom,controller-typepower-sourceallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_lvs1_3_6-supplyvin_lvs2-supplyvin_lvs4_5_7-supplyvdd_l1_l2_l12_l18-supplyvdd_l24-supplyvdd_l25-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosmmc-pwrseqqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvdda-supplyvdda_phy-supplyvdda_refclk-supplyperst-gpiovddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesremote-endpointcpuregulator-nameserial0stdout-pathreset-gpios