P8(1Phytec phyFLEX-i.MX6 DualLite/Solo Carrier-Board5!phytec,imx6dl-pbab01phytec,imx6dl-pfla02fsl,imx6dlchosen ,/soc/bus@2100000/serial@21f0000aliases"8/soc/bus@2100000/ethernet@2188000!B/soc/bus@2000000/flexcan@2090000!G/soc/bus@2000000/flexcan@2094000L/soc/bus@2000000/gpio@209c000R/soc/bus@2000000/gpio@20a0000X/soc/bus@2000000/gpio@20a4000^/soc/bus@2000000/gpio@20a8000d/soc/bus@2000000/gpio@20ac000j/soc/bus@2000000/gpio@20b0000p/soc/bus@2000000/gpio@20b4000v/soc/bus@2100000/i2c@21a0000{/soc/bus@2100000/i2c@21a4000/soc/bus@2100000/i2c@21a8000/soc/ipu@2400000/soc/bus@2100000/mmc@2190000/soc/bus@2100000/mmc@2194000/soc/bus@2100000/mmc@2198000/soc/bus@2100000/mmc@219c0001/soc/bus@2000000/spba-bus@2000000/serial@2020000 /soc/bus@2100000/serial@21e8000 /soc/bus@2100000/serial@21ec000 /soc/bus@2100000/serial@21f0000 /soc/bus@2100000/serial@21f4000./soc/bus@2000000/spba-bus@2000000/spi@2008000./soc/bus@2000000/spba-bus@2000000/spi@200c000./soc/bus@2000000/spba-bus@2000000/spi@2010000./soc/bus@2000000/spba-bus@2000000/spi@2014000 /soc/bus@2000000/usbphy@20c9000 /soc/bus@2000000/usbphy@20ca000/soc/bus@2100000/i2c@21f8000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6ldb!fsl,imx6q-ldbfsl,imx53-ldb  disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0* disabledport@0*endpoint.>Sport@1*endpoint.>Wlvds-channel@1* disabledport@0*endpoint.>Tport@1*endpoint.>Xpmu!arm,cortex-a9-pmuF W^usbphynop1!usb-nop-xceivb>0usbphynop2!usb-nop-xceivb>1soc !simple-busFmdma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh* 0W    tgpmi0gpmi1gpmi2gpmi3j>nand-controller@112000!fsl,imx6q-gpmi-nand* @ gpmi-nandbch Wtbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefault hdmi@120000* Ws {| iahbisfrokay!fsl,imx6dl-hdmiport@0*endpoint. >Qport@1*endpoint. >Ugpu@130000 !vivante,gc*@ W zJbuscoreshader gpu@134000 !vivante,gc*@@ W y buscore timer@a00600!arm,cortex-a9-twd-timer*  W F interrupt-controller@a01000!arm,cortex-a9-gic *F > cache-controller@a02000!arm,pl310-cache*  W\"0 < L]>Ypcie@1ffc000!fsl,imx6q-pciesnps,dw-pcie*@ dbiconfigqpci}0m Wxtmsi{zyxpciepcie_buspcie_phyokaydefault bus@2000000!fsl,aips-bussimple-bus*mspba-bus@2000000!fsl,spba-bussimple-bus*mspdif@2004000!fsl,imx35-spdif*@@ W4 rxtxPkv>:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ Wppipgper rxtx disabledspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ W qqipgper rxtx disabledspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspi*@ W!rripgper rxtxokaydefault flash@0!m25p80jedec,spi-nor1-*spi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspi*@@ W"ssipgper   rxtx disabledserial@2020000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtx disabledesai@2024000!fsl,imx35-esai*@@ W3(vcorememextalfsysspba rxtx disabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssi*@ W. ipgbaud %&rxtx disabledssi@202c000!fsl,imx6q-ssifsl,imx51-ssi*@ W/ ipgbaud )*rxtxokay>bssi@2030000!fsl,imx6q-ssifsl,imx51-ssi*@ W0 ipgbaud -.rxtx disabledasrc@2034000!fsl,imx53-asrc*@@ W2kmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxcokayspba@203c000*@vpu@2040000!fsl,imx6dl-vpucnm,coda960*W  tbitjpegperahb ")aipstz@207c000*@pwm@2080000.!fsl,imx6q-pwmfsl,imx27-pwm*@ WS>ipgper disabledpwm@2084000.!fsl,imx6q-pwmfsl,imx27-pwm*@@ WT>ipgper disabledpwm@2088000.!fsl,imx6q-pwmfsl,imx27-pwm*@ WU>ipgper disabledpwm@208c000.!fsl,imx6q-pwmfsl,imx27-pwm*@ WV>ipgper disabledflexcan@2090000!fsl,imx6q-flexcan* @ Wnlmipgper94okaydefaultflexcan@2094000!fsl,imx6q-flexcan* @@ Wonoipgper94 disabledtimer@2098000!fsl,imx6dl-gpt* @ W7wxipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpio* @WBCGW @c   {y~z>7gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpio* @WDEGW cJIHGFEDOvuq>=gpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpio* @@WFGGW @cai cQ>4gpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpio* @WHIGW c     '8=.>gpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpio* @WJKGW cxML/ 9%$#&gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpio* @WLMGW  cK   Ngpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpio* @@WNOGW c   keypad@20b8000!fsl,imx6q-kppfsl,imx21-kpp* @ WR> disabledwatchdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdt* @ WP>watchdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdt* @ WQ> disabledclock-controller@20c4000!fsl,imx6q-ccm* @@WWX>anatop@20c8000#!fsl,imx6q-anatopsysconsimple-mfd* $W16>regulator-1p1!fsl,anatop-regulatorovdd1p1~B@O 5$7regulator-3p0!fsl,anatop-regulatorovdd3p0~*0 ( $3@7regulator-2p5!fsl,anatop-regulatorovdd2p5~"U)00 $+x7regulator-vddcore!fsl,anatop-regulatorovddarm~  @Ipax $ >Zregulator-vddpu!fsl,anatop-regulatorovddpu~  @ Ipax $ >regulator-vddsoc!fsl,anatop-regulatorovddsoc~  @Ipax $ >[tempmon!fsl,imx6q-tempmonF W1calibtemp_gradeusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy*  W,>)usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy*  W->-snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfd* @>snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4Wsnvs-poweroff!syscon-poweroff8`` disabledsnvs-powerkey!fsl,sec-v4.0-pwrkey W t disabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000* @ W8epit@20d4000* @@ W9reset-controller@20d8000!fsl,imx6q-srcfsl,imx51-src* @W[`)>gpc@20dc000!fsl,imx6q-gpc* @  WYF >ipg>pgcpower-domain@0*6power-domain@1*6J0zJy> iomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfd*8>mux-controller !mmio-muxW8j448 (( >ipu1_csi0_mux !video-muxxport@0*endpoint.>Cport@1*endpoint.>Eport@2*endpoint. >Gport@3*endpoint.!>Iport@4*endpointport@5*endpoint.">Oipu1_csi1_mux !video-muxxport@0*endpoint.#>Dport@1*endpoint.$>Fport@2*endpoint.%>Hport@3*endpoint.&>Jport@4*endpointport@5*endpoint.'>Ppinctrl@20e0000!fsl,imx6dl-iomuxc*@default(>imx6q-phytec-pfla02hoggrpx`0D,>(ecspi3grpH>enetgrp000000000 0$0(0>2flexcan1grp0`HL4>gpminandgrppXlTt\x`<$8 lptx|@(> i2c1grp0X(h@tDl@><i2c2grp0p@Dt@>>i2c3grp0Hx@L|@>Apciegrp>uart3grp`d4h8 P |L>Muart4grp0D,X@ >Nusbh1grp >/usbotggrpHpYT< hP>,usdhc2grppY 0YpYpYpYpY>6usdhc3grppY  4YpYpYpY pY>9usdhc3cdwp0>:audmuxgrp`000>Bdcic@20e4000*@@ W|dcic@20e8000*@ W}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdma*@ W>ipgahbimx/sdma/sdma-imx6q.bin>pxp@20f0000*@ Wbepdc@20f4000*@@ Wabus@2100000!fsl,aips-bussimple-bus*mcrypto@2100000 !fsl,sec-v4.0* m memaclkipgemi_slowjr@1000!fsl,sec-v4.0-job-ring* Wijr@2000!fsl,sec-v4.0-job-ring*  Wjaipstz@217c000*@usb@2184000!fsl,imx6q-usbfsl,imx27-usb*@ W+)*okay+default,usb@2184200!fsl,imx6q-usbfsl,imx27-usb*B W(-*hostokay.default/usb@2184400!fsl,imx6q-usbfsl,imx27-usb*D W)0 hsic*host disabledusb@2184600!fsl,imx6q-usbfsl,imx27-usb*F W*1 hsic*host disabledusbmisc@2184800)!fsl,imx6q-usbmisc*H>*ethernet@2188000!fsl,imx6q-fec*@ tint0ppsWvw uuipgahbptpenet_out 94okaydefault263ArgmiiJ  ]4m5mdioethernet-phy@0!ethernet-phy-ieee802.3-c22*xD>3mlb@218c000*@$W5u~mmc@2190000!fsl,imx6q-usdhc*@ W ipgahbper disabledmmc@2194000!fsl,imx6q-usdhc*@@ W ipgahbperokaydefault6 7 78mmc@2198000!fsl,imx6q-usdhc*@ W ipgahbperokaydefault9: 7 7;mmc@219c000!fsl,imx6q-usdhc*@ W ipgahbper disabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2c*@ W$}okaydefault<eeprom@50 !atmel,24c32*Ppmic@58 !dlg,da9063*XF=W  regulatorsbcore1~ #>bcore2~ #>bpro~``bperi~2Z2Zbmem~2Z2Zbio~OOldo4~&%&%>5ldo5~--ldo6~2Z2Zldo9~2Z2Z>;ldo10~2Z2Z>8ldo11~--i2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2c*@@ W%~okaydefault>tlv320@18!ti,tlv320aic3007*???@>cstmpe@41 !st,stmpe811*Artc@51!epson,rtc8564*Qadc@64!maxim,max1037*di2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2c*@ W&okaydefaultAromcp@21ac000*@memory-controller@21b0000!fsl,imx6q-mmdc*@memory-controller@21b4000!fsl,imx6q-mmdc*@@ disabledweim@21b8000!fsl,imx6q-weim*@ W disabledefuse@21bc000!fsl,imx6q-ocotpsyscon*@speed-grade@10*>\calib@38*8>temp-grade@20* >tzasc@21d0000*@ Wltzasc@21d4000*@@ Wmaudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmux*@okaydefaultBssi2 pins5  mipi@21dc000!fsl,imx6-mipi-csi2*@Wdea dphyrefpix disabledport@1*endpoint@0*.C>endpoint@1*.D>#port@2*endpoint@0*.E>endpoint@1*.F>$port@3*endpoint@0*.G> endpoint@1*.H>%port@4*endpoint@0*.I>!endpoint@1*.J>&mipi@21e0000*@ disabledportsport@0*endpoint.K>Rport@1*endpoint.L>Vvdoa@21e4000!fsl,imx6q-vdoa*@@ Wserial@21e8000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtx disabledserial@21ec000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper rxtxokaydefaultM*serial@21f0000!fsl,imx6q-uartfsl,imx21-uart*@ Wipgper  rxtxokaydefaultNserial@21f4000!fsl,imx6q-uartfsl,imx21-uart*@@ Wipgper !"rxtx disabledi2c@21f8000!fsl,imx6q-i2cfsl,imx21-i2c*@ W#t disabledipu@2400000!fsl,imx6q-ipu*@@W busdi0di1"port@0*>]endpoint.O>"port@1*>^endpoint.P>'port@2*>_endpoint@0*endpoint@1*.Q> endpoint@2*.R>Kendpoint@3*.S>endpoint@4*.T>port@3*>`endpoint@0*endpoint@1*.U> endpoint@2*.V>Lendpoint@3*.W>endpoint@4*.X>sram@900000 !mmio-sram*>cpuscpu@0!arm,cortex-a9qcpu*:YK2  0\2  ul(h)armpll2_pfd2_396msteppll1_swpll1_sysZ[\ speed_gradecpu@1!arm,cortex-a9qcpu*:YK2  0\2  ul(h)armpll2_pfd2_396msteppll1_swpll1_sysZ[capture-subsystem!fsl,imx-capture-subsystem]^display-subsystem!fsl,imx-display-subsystem_`memory@10000000qmemory* regulators !simple-busregulator@0!regulator-fixed* ousb_otg_vbus~LK@LK@ >+regulator@1!regulator-fixed* ousb_h1_vbus~LK@LK@ 7>.regulator@2!regulator-fixed*oi2s-audio-1v8~w@w@>@regulator@3!regulator-fixed*oi2s-audio-3v3~2Z2Z>?leds !gpio-ledsgreenphyflex:green 7red phyflex:red =oscillator !fixed-clock$ tlv320-mclk>dsound!simple-audio-cardOnboardTLV320AIC3007i2sa'aXFMicrophoneMic JackLineLine InLineLine OutSpeakerSpeakerHeadphoneHeadphone Jack`Line OutLLOUTLine OutRLOUTSpeakerSPOPSpeakerSPOMHeadphone JackHPLOUTHeadphone JackHPROUTMIC3LMic JackMIC3RMic JackMic JackMic BiasLINE1LLine InLINE1RLine Insimple-audio-card,cpuzbsimple-audio-card,codeczcd>a #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3#clock-cellsclock-frequencygprstatusclocksclock-namesregremote-endpointphandleinterrupt-parentinterrupts#phy-cellsrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namespinctrl-namespinctrl-0nand-on-flash-bbtpower-domains#cooling-cells#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridedevice_typebus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapreset-gpiocs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsfsl,stop-modegpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthvin-supplyregulator-enable-ramp-delayfsl,tempmonnvmem-cellsnvmem-cell-names#thermal-sensor-cellsfsl,anatopregmapvaluelinux,keycodewakeup-source#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_modephy_type#index-cellsphy-handlephy-modephy-reset-durationphy-reset-gpiosphy-supplytxc-skew-psrxc-skew-psbus-widthcd-gpioswp-gpiosvmmc-supplyai3x-micbias-vgAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyfsl,weim-cs-gprfsl,audmux-portfsl,port-configuart-has-rtsctsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportsenable-active-highlabelclock-output-namessimple-audio-card,namesimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,widgetssimple-audio-card,routingsound-dai