Ð þí-t8) (Ô)hxlnx,zynq-zc706xlnx,zynq-7000&Xilinx ZC706 boardcpuscpu@0arm,cortex-a9,cpu8<CèQ] ,+B@B@cpu@1arm,cortex-a9,cpu8<fpga-full fpga-regionnwpmu@f8891000arm,cortex-a9-pmu~‰8ø‰ø‰0fixedregulatorregulator-fixedšVCCPINT©B@ÁB@Ùëÿamba simple-bus‰wadc@f8007100xlnx,zynq-xadc-1.00.a8øq  ~‰< can@e0008000xlnx,zynq-can-1.0 disabled<$ can_clkpclk8à€ ~‰@(@can@e0009000xlnx,zynq-can-1.0 disabled<% can_clkpclk8à ~3‰@(@gpio@e000a000xlnx,zynq-gpio-1.06<*BRg‰ ~8à xdefault†i2c@e0004000cdns,i2c-r1p10okay<&‰ ~8à@€xdefault†i2c-mux@74 nxp,pca95488ti2c@08clock-generator@5d  silabs,si570­28]à P/Ùî i2c@18hdmi-tx@39 adi,adv751189Ðàyuv422õ1xevenlyi2c@28eeprom@54 atmel,24c088Ti2c@38gpio@21 ti,tca64168!B6i2c@48rtc@51 nxp,pcf85638Qi2c@78ucd90120@65 ti,ucd901208ei2c@e0005000cdns,i2c-r1p10 disabled<'‰ ~08àPinterrupt-controller@f8f01000arm,cortex-a9-gicgR8øðøðÿcache-controller@f8f02000arm,pl310-cache8øð  ~ - >N\memory-controller@f8006000xlnx,zynq-ddrc-a058ø`serial@e0000000xlnx,xuartpscdns,uart-r1p8 disabled<(uart_clkpclk8à ~serial@e0001000xlnx,xuartpscdns,uart-r1p8okay<)uart_clkpclk8à ~2xdefault†spi@e0006000xlnx,zynq-spi-r1p68à` disabled‰ ~<" ref_clkpclkspi@e0007000xlnx,zynq-spi-r1p68àp disabled‰ ~1<# ref_clkpclkethernet@e000b000cdns,zynq-gemcdns,gem8à°okay ~< pclkhclktx_clk hrgmii-idqxdefault† ethernet-phy@78 ,ethernet-phyÿethernet@e000c000cdns,zynq-gemcdns,gem8àÀ disabled ~-<pclkhclktx_clkmmc@e0100000arasan,sdhci-8.9aokayclk_xinclk_ahb< ‰ ~8àxdefault† mmc@e0101000arasan,sdhci-8.9a disabledclk_xinclk_ahb<!‰ ~/8àslcr@f8000000!xlnx,zynq-slcrsysconsimple-mfd8øwÿ clkc@100 xlnx,ps7-clkc|jˆarmpllddrplliopllcpu_6or4xcpu_3or2xcpu_2xcpu_1xddr2xddr3xdcilqspismcpcapgem0gem1fclk0fclk1fclk2fclk3can0can1sdio0sdio1uart0uart1spi0spi1dmausb0_aperusb1_apergem0_apergem1_apersdio0_apersdio1_aperspi0_aperspi1_apercan0_apercan1_aperi2c0_aperi2c1_aperuart0_aperuart1_apergpio_aperlqspi_apersmc_aperswdtdbg_trcdbg_apb8›ü Uÿrstc@200xlnx,zynq-reset8H¬¹ pinctrl@700xlnx,pinctrl-zynq8¹ gem0-defaultÿ mux Àethernet0Éethernet0_0_grpconfÉethernet0_0_grpÐÚconf-rx$æMIO22MIO23MIO24MIO25MIO26MIO27ëÿconf-tx$æMIO16MIO17MIO18MIO19MIO20MIO21"mux-mdioÀmdio0 Émdio0_0_grpconf-mdio Émdio0_0_grpÐÚ"gpio0-defaultÿmuxÀgpio0&Égpio0_7_grpgpio0_46_grpgpio0_47_grpconf&Égpio0_7_grpgpio0_46_grpgpio0_47_grpÐÚconf-pull-up æMIO46MIO47/conf-pull-noneæMIO7"i2c0-defaultÿmux Éi2c0_10_grpÀi2c0conf Éi2c0_10_grp/ÐÚsdhci0-defaultÿ mux Ésdio0_2_grpÀsdio0conf Ésdio0_2_grpÐÚ"mux-cd Égpio0_14_grp Àsdio0_cdconf-cd Égpio0_14_grpë/ÐÚmux-wp Égpio0_15_grp Àsdio0_wpconf-wp Égpio0_15_grpë/ÐÚuart1-defaultÿmux Éuart1_10_grpÀuart1conf Éuart1_10_grpÐÚconf-rxæMIO49ëconf-txæMIO48"usb0-defaultÿ mux Éusb0_0_grpÀusb0conf Éusb0_0_grpÐÚconf-rxæMIO29MIO31MIO36ëconf-tx6æMIO28MIO30MIO32MIO33MIO34MIO35MIO37MIO38MIO39"dmac@f8003000arm,pl330arm,primecell8ø0‰.