Ð þí>‰8;˜(ñ;` ,t3-cqa3t-bv3:2qihua,t3-cqa3t-bv3allwinner,sun8i-t3allwinner,sun8i-r40clocks=osc24MD 2fixed-clockQn6aÃPposc24Mƒosc32kD 2fixed-clockQ€aN  pext-osc32kƒcpuscpu@02arm,cortex-a7‹cpu—cpu@12arm,cortex-a7‹cpu—cpu@22arm,cortex-a7‹cpu—cpu@32arm,cortex-a7‹cpu—display-engine#2allwinner,sun8i-r40-display-engine›¯okaysoc 2simple-bus=clock@100000072allwinner,sun8i-r40-de2-clkallwinner,sun8i-h3-de2-clk—¶<Œ½busmodÉ$DЃmixer@1100000 2allwinner,sun8i-r40-de2-mixer-0—¶½busmodɃportsport@1—endpoint݃mixer@1200000 2allwinner,sun8i-r40-de2-mixer-1— ¶½busmodɃportsport@1—endpoint݃interrupt-controller@1c000302allwinner,sun7i-a20-sc-nmií—À0  ƒmmc@1c0f00012allwinner,sun8i-r40-mmcallwinner,sun50i-a64-mmc—Àð¶ k½ahbmmcÉahb*4default  ¯okayB NX mmc@1c1000012allwinner,sun8i-r40-mmcallwinner,sun50i-a64-mmc—Á¶!l½ahbmmcÉ ahb ! ¯disabledmmc@1c1100032allwinner,sun8i-r40-emmcallwinner,sun50i-a64-emmc—Á¶"m½ahbmmcÉ ahb* 4default "¯okayB a Nnmmc@1c1200012allwinner,sun8i-r40-mmcallwinner,sun50i-a64-mmc—Á ¶#n½ahbmmcÉ ahb # ¯disabledphy@1c134002allwinner,sun8i-r40-usb-phy —Á4ÁHÁ˜ÁÈ|phy_ctrlpmu0pmu1pmu2¶|}~½usb0_phyusb1_phyusb2_phyÉ!usb0_resetusb1_resetusb2_reset¯okay†‘ ¢ ƒsata@1c180002allwinner,sun8i-r40-ahci—Á€ 8¶-{Éahci¯okay³ ¿usb@1c19000&2allwinner,sun8i-r40-ehcigeneric-ehci—Á L¶0ÉÊÏusb¯okayusb@1c19400&2allwinner,sun8i-r40-ohcigeneric-ohci—Á” @¶3€ÉÊÏusb¯okayusb@1c1c000&2allwinner,sun8i-r40-ehcigeneric-ehci—ÁÀ N¶1ÉÊÏusb¯okayusb@1c1c400&2allwinner,sun8i-r40-ohcigeneric-ohci—ÁÄ A¶4ÉÊÏusb¯okayclock@1c200002allwinner,sun8i-r40-ccu— ¶ ½hoscloscDЃrtc@1c204002allwinner,sun8i-r40-rtc— posc32kosc32k-out¶Dƒpinctrl@1c208002allwinner,sun8i-r40-pinctrl— ¶O½apbhoscloscÙíéƒ clk-out-a-pinõPI12 úclk_out_agmac-rgmii-pinsBõPA0PA1PA2PA3PA4PA5PA6PA7PA8PA10PA11PA12PA13PA15PA16úgmac(i2c0-pinsõPB0PB1úi2c0ƒmmc0-pinsõPF0PF1PF2PF3PF4PF5úmmc0ƒmmc1-pg-pinsõPG0PG1PG2PG3PG4PG5úmmc1mmc2-pins7õPC5PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24úmmc2ƒ uart0-pb-pins õPB22PB23úuart0ƒuart3-pg-pinsõPG6PG7úuart3uart3-rts-cts-pg-pinsõPG8PG9úuart3watchdog@1c20c902allwinner,sun4i-a10-wdt—  ¶serial@1c280002snps,dw-apb-uart—€ )¶`ÉI¯okay4default*serial@1c284002snps,dw-apb-uart—„ )¶aÉJ ¯disabledserial@1c288002snps,dw-apb-uart—ˆ )¶bÉK ¯disabledserial@1c28c002snps,dw-apb-uart—ÂŒ )¶cÉL ¯disabledserial@1c290002snps,dw-apb-uart— )¶dÉM ¯disabledserial@1c294002snps,dw-apb-uart—” )¶eÉN ¯disabledserial@1c298002snps,dw-apb-uart—˜ )¶fÉO ¯disabledserial@1c29c002snps,dw-apb-uart—Âœ )¶gÉP ¯disabledi2c@1c2ac002allwinner,sun6i-a31-i2c—¬ ¶WÉ@*4default¯okaypmic@342x-powers,axp221—4íac-power-supply 2x-powers,axp221-ac-power-supply ¯disabledadc2x-powers,axp221-adc6battery-power-supply%2x-powers,axp221-battery-power-supply ¯disabledregulatorsH ¸dcdc1[vcc-3v0j~-ÆÀ–-ÆÀƒ dcdc2[vdd-cpuj~B@–Ö dcdc3[vdd-sysj~B@–Ö dcdc4[dcdc4dcdc5 [vcc-dramj~ã`–ã`dc1sw[dc1swdc5ldo[dc5ldoaldo1[aldo1aldo2[vcc-paj~&% –&% aldo3[avccj~)2à–2Z dldo1[vcc-pgj~2Z –2Z dldo2[dldo2dldo3 [vcc-dldo3j~2Z –2Z dldo4[dldo4ƒ eldo1[eldo1eldo2[eldo2eldo3[vcc-pej~*¹€–*¹€ƒldo_io0[ldo_io0 ¯disabledldo_io1[ldo_io1 ¯disabledrtc_ldoj~-ÆÀ–-ÆÀ[rtc_ldodrivevbus [drivevbus ¯disabledusb_power_supply!2x-powers,axp221-usb-power-supply ¯disabledi2c@1c2b0002allwinner,sun6i-a31-i2c—° ¶XÉA ¯disabledi2c@1c2b4002allwinner,sun6i-a31-i2c—´  ¶YÉB ¯disabledi2c@1c2b8002allwinner,sun6i-a31-i2c—¸ X¶ZÉC ¯disabledi2c@1c2c0002allwinner,sun6i-a31-i2c—ÂÀ Y¶_ÉH ¯disabledethernet@1c500002allwinner,sun8i-r40-gmac®—Å UµmacirqÉ( stmmaceth¶@ ½stmmaceth ¯disabledmdio2snps,dwmac-mdiotcon-top@1c700002allwinner,sun8i-r40-tcon-top—Ç0¶K‘žœ$½bustcon-tv0tve0tcon-tv1tve1dsi'ptcon-top-tv0tcon-top-tv1tcon-top-dsiÉ3Dƒportsport@0—endpoint݃port@1—endpoint@0—endpoint@1—endpoint@2—݃ endpoint@3—݃#port@2—endpoint@1—݃port@3—endpoint@0—endpoint@1—endpoint@2—݃!endpoint@3—݃$port@4—endpoint@0—݃"endpoint@1—݃%port@5—endpoint݃'lcd-controller@1c730002allwinner,sun8i-r40-tcon-tv—Ç0 3¶I ½ahbtcon-ch1É1lcd¯okayportsport@0—endpoint@0—Ý ƒendpoint@1—Ý!ƒport@1—endpoint@1—Ý"ƒlcd-controller@1c740002allwinner,sun8i-r40-tcon-tv—Ç@ 4¶J ½ahbtcon-ch1É2lcd ¯disabledportsport@0—endpoint@0—Ý#ƒendpoint@1—Ý$ƒport@1—endpoint@1—Ý%ƒinterrupt-controller@1c81000 2arm,gic-400 —ÈÈ È@ È` í  ƒhdmi@1ee000092allwinner,sun8i-r40-dw-hdmiallwinner,sun8i-a83t-dw-hdmi—î) :¶;š™½iahbisfrtmdsÉ#ctrlÊ&Ïphy¯okayportsport@0—endpointÝ'ƒport@1—endpointÝ(ƒ)hdmi-phy@1ef00002allwinner,sun8i-r40-hdmi-phy—ï ¶:š½busmodpll-0pll-1É"phy†ƒ&timer2arm,armv7-timer0   aliasesÅ/soc/serial@1c28000chosenÍserial0:115200n8connector2hdmi-connector’aportendpointÝ)ƒ(vcc5v02regulator-fixed[vcc5v0~LK@–LK@Ù Þƒ  #address-cells#size-cellsinterrupt-parentmodelcompatibleranges#clock-cellsclock-frequencyclock-accuracyclock-output-namesphandledevice_typeregallwinner,pipelinesstatusclocksclock-namesresets#reset-cellsremote-endpointinterrupt-controller#interrupt-cellsinterruptsreset-namespinctrl-0pinctrl-namesvmmc-supplybus-widthcd-gpiosvqmmc-supplynon-removablereg-names#phy-cellsusb1_vbus-supplyusb2_vbus-supplyahci-supplyphy-supplyphysphy-namesgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-upreg-shiftreg-io-width#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltsysconinterrupt-namesserial0stdout-pathgpioenable-active-high