8(Asus Nexus7(flo)!asus,nexus7-floqcom,apq8064,reserved-memory=smem@80000000D HOwcnss@8f000000DpHOSramoops@88d00000!ramoopsDWcpcpuscpu@0 !qcom,krait|qcom,kpss-acc-v1cpuDOecpu@1 !qcom,krait|qcom,kpss-acc-v1cpuDOgcpu@2 !qcom,krait|qcom,kpss-acc-v1cpuD Oicpu@3 !qcom,krait|qcom,kpss-acc-v1cpuD  Okl2-cache!cacheOidle-statesspc#!qcom,idle-state-spcarm,idle-state OmemorymemoryDthermal-zonescpu-thermal0+ ;tripstrip0H$Tpassivetrip1HT criticalcpu-thermal1+ ;ltripstrip0H$Tpassivetrip1HT criticalcpu-thermal2+ ;tripstrip0H$Tpassivetrip1HT criticalcpu-thermal3+ ;ltripstrip0H$Tpassivetrip1HT criticalcpu-pmu!qcom,krait-pmu _ clockscxo_board !fixed-clockjw$O0pxo_board !fixed-clockjwsleep_clk !fixed-clockjwO/hwmutex!qcom,sfpb-mutex  Osmem !qcom,smemsmd !qcom,smdmodem@0 _%  disabledq6@1 _Z  disableddsps@3 _ @ disabledriva@6 _  disabledsmsm !qcom,smsm    @apps@0DOZmodem@1D _&(q6@2D _Y(wcnss@3D _(ORdsps@4D _(firmwarescm!qcom,scm-apq80649 @coreiio-hwmon !iio-hwmonTL   soc= !simple-buspinctrl@800000!qcom,apq8064-pinctrlD@Xh( _tdefaultOsdc4-gpiosO>pios*gpio63gpio64gpio65gpio66gpio67gpio68sdc4sdcc1-pin-activeO9clk sdc1_clkcmd sdc1_cmd data sdc1_data sdcc3-pin-activeclk sdc3_clkcmd sdc3_cmddata sdc3_dataps_holdOmuxgpio78ps_holdi2c1Omuxgpio20gpio21gsbi1pinconfgpio20gpio21i2c1_pins_sleepOmuxgpio20gpio21gpiopinconfgpio20gpio21gsbi1_uart_2pinsmuxgpio18gpio19gsbi1gsbi1_uart_4pinsmuxgpio18gpio19gpio20gpio21gsbi1i2c2Omuxgpio24gpio25gsbi2pinconfgpio24gpio25i2c2_pins_sleepOmuxgpio24gpio25gpiopinconfgpio24gpio25i2c3Omux gpio8gpio9gsbi3pinconf gpio8gpio9i2c3_pins_sleepOmux gpio8gpio9gpiopinconf gpio8gpio9i2c4Omuxgpio12gpio13gsbi4pinconfgpio12gpio13i2c4_pins_sleepOmuxgpio12gpio13gpiopinconfgpio12gpio13spi5_defaultOpinmuxgpio51gpio52gpio54gsbi5pinmux_csgpiogpio53pinconfgpio51gpio52gpio54pinconf_csgpio53spi5_sleepO pinmuxgpiogpio51gpio52gpio53gpio54pinconfgpio51gpio52gpio53gpio54i2c6O"muxgpio16gpio17gsbi6pinconfgpio16gpio17i2c6_pins_sleepO#muxgpio16gpio17gpiopinconfgpio16gpio17gsbi6_uart_2pinsmuxgpio14gpio15gsbi6gsbi6_uart_4pinsO!muxgpio14gpio15gpio16gpio17gsbi6gsbi7_uart_2pinsmuxgpio82gpio83gsbi7gsbi7_uart_4pinsmuxgpio82gpio83gpio84gpio85gsbi7i2c7O$muxgpio84gpio85gsbi7pinconfgpio84gpio85i2c7_pins_sleepO%muxgpio84gpio85gpiopinconfgpio84gpio85riva-fm-activegpio14gpio15riva_fmriva-bt-activegpio16gpio17riva_btriva-wlan-active#gpio64gpio65gpio66gpio67gpio68 riva_wlanhdmi-pinctrlOMmuxgpio70gpio71gpio72hdmipinconf_ddcgpio70gpio71pinconf_hpdgpio72syscon@1200000!sysconD O interrupt-controller@2000000!qcom,msm-qgic2(D Otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$_Dwclock-controller@2088000!qcom,kpss-acc-v1DOclock-controller@2098000!qcom,kpss-acc-v1D Oclock-controller@20a8000!qcom,kpss-acc-v1D Oclock-controller@20b8000!qcom,kpss-acc-v1D O power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2DOpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D Opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2D O sps-sic-non-secure@12100000!sysconDOgsbi@12440000okay!qcom,gsbi-v1.0.0DD9 @iface= serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDE@ _9  @coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1"tdefaultDF _9  @coreifaceokayw @eeprom@52 !atmel,24c128DR, bq27541@55 !ti,bq27541DUgsbi@12480000 disabled!qcom,gsbi-v1.0.0DH9 @iface= i2c@124a0000!qcom,i2c-qup-v1.1.1DJ"tdefaultsleep _9  @coreiface disabledgsbi@16200000okay!qcom,gsbi-v1.0.0D 9 @iface=i2c@16280000!qcom,i2c-qup-v1.1.1"tdefaultD( _9  @coreifaceokayw @trackpad@10!elan,ekth3500D,_gsbi@16300000 disabled!qcom,gsbi-v1.0.0D09 @iface=i2c@16380000!qcom,i2c-qup-v1.1.1"tdefaultsleepD8 _9  @coreiface disabledgsbi@1a200000 disabled!qcom,gsbi-v1.0.0D 9 @iface=serial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmD$  _9  @coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1D( _" tdefaultsleep9  @coreiface disabledgsbi@16500000ok!qcom,gsbi-v1.0.0DP9 @iface=serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDTP _9  @coreifaceoktdefault!i2c@16580000!qcom,i2c-qup-v1.1.1""#tdefaultsleepDX _9  @coreiface disabledgsbi@16600000ok!qcom,gsbi-v1.0.0D`9 @iface= serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmDd` _9  @coreifaceoki2c@16680000!qcom,i2c-qup-v1.1.1$"%tdefaultsleepDh _9  @coreiface disabledrng@1a500000 !qcom,prngDP9 @coressbi@c00000 !qcom,ssbiD 5pmic-arbiterpmic@1 !qcom,pm8821,_L(mpps@50!qcom,pm8821-mppqcom,ssbi-mppDP _Xhqcom,ssbi@500000 !qcom,ssbiDP 5pmic-arbiterpmic@0 !qcom,pm8921,_J(O'gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioDP(XJ&,hO&mpps@50!qcom,pm8921-mppqcom,ssbi-mppDPXh`_rtc@11d!qcom,pm8921-rtc,'_'DVpwrkey@1c!qcom,pm8921-pwrkeyD,'_23e= xoadc@197!qcom,pm8921-adcD n'NOadc-channel@00Dadc-channel@01Dadc-channel@02Dadc-channel@04Dadc-channel@08Dadc-channel@09D adc-channel@0aD adc-channel@0bD adc-channel@0cD adc-channel@0dD adc-channel@0eDadc-channel@0fDqfprom@700000 !qcom,qfpromDp=calibDO(backup_calibDO)clock-controller@900000!qcom,gcc-apq8064D@()calibcalib_backupjO clock-controller@28000000!qcom,lcc-apq8064D(jclock-controller@4000000!qcom,mmcc-apq8064DjO?clock-controller@2011000!sysconDOrpm@108000!qcom,rpm-apq8064D $_ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccjOregulators!qcom,rpm-pm8921-regulators***%+4+C+S,b,q,-s1((0O+s2OVs3 0I>OTs4w@w@0O*s7  0O,s8l1l2OOODl3..O2l4w@w@O3l5-p-pO;l6-p-pO-l7l8OEl9l10OWl11--OGl12l14l15l16l17--OKl18l21l22l23w@w@l24OUl25l26l27l28l29lvs1lvs2OXlvs3lvs4lvs5lvs6lvs7OFusb-switchhdmi-switchncpusb@12500000 !qcom,ci-hdrcDPP _d9 ~ @coreiface  @core&ulpi/@.Eusb-phyokayOotgO1ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy9/0 @sleepref1porWb2n3O.usb@12520000 !qcom,ci-hdrcDRR _9 ) ' @coreiface ) dcore&ulpi/@4Eusb-phy disabledO5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyW9/0 @sleepref5porO4usb@12530000 !qcom,ci-hdrcDSS _9 , * @coreiface , ecore&ulpi/@6Eusb-phy disabledO7ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyW9/0 @sleepref7porO6phy@1b400000!qcom,apq8064-sata-phy disabledD@zphy_mem9 -@cfgWO8sata@29000000!qcom,apq8064-ahcigeneric-ahci disabledD) _(9 ; . )@slave_ifaceifacebusrxoobcore_pmalive @8 Esata-phydma@12402000!qcom,bam-v1.3.0D@  _b9 n@bam_clkO:dma@12182000!qcom,bam-v1.3.0D  _`9 p@bam_clkO<dma@121c2000!qcom,bam-v1.3.0D  __9 q@bam_clkO=amba !simple-bus=sdcc@12400000okay!arm,pl18xarm,primecelltdefault9D@  _hcmd_irq9 x n@mclkapb_pclk ::txrx;$*sdcc@12180000!arm,pl18xarm,primecell disabledD  _fcmd_irq9 z p@mclkapb_pclk q1 <<txrxsdcc@121c0000!arm,pl18xarm,primecell disabledD  _ecmd_irq9 { q@mclkapb_pclkl ==txrxtdefault>syscon@1a400000!qcom,tcsr-apq8064sysconD@Oadreno-3xx@4300000!qcom,adreno-3xxD0zkgsl_3d0_reg_memory _P kgsl_3d0_irq)@core_clkiface_clkmem_clkmem_iface_clk 9?G??!?:F@@@@@@@@@@ @ @ @ @ @@@@@@@@@@@@@@@@@@AAAAAAAAAA A A A A AAAAAAAAAAAAAAAAAAqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0Mtqcom,gpu-pwrlevel@1Msyscon@5700000!sysconDppOCmdss_dsi@4700000!qcom,mdss-dsi-ctrl[MDSS DSI CTRL->0 _RDp zdsi_ctrl89????9?T?j?XD@iface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ?S?W?8?i aBBBBxC@BokayDEFGHportsport@0DendpointIOQport@1DendpointJOLpanel@0D!jdi,lt070me05000KF &$ 6  &portendpointLOJdsi-phy@4700200!qcom,dsi-phy-28nm-8960jWDppp\"zdsi_plldsi_phydsi_phy_regulator@iface_clkref 9?0okayFOBiommu@7500000!qcom,apq8064-iommu@smmu_pclkiommu_clk9? ?DP_?@(OOiommu@7600000!qcom,apq8064-iommu@smmu_pclkiommu_clk9? ?D`_=>(OPiommu@7c00000!qcom,apq8064-iommu@smmu_pclkiommu_clk9? ?!D_EF(O@iommu@7d00000!qcom,apq8064-iommu@smmu_pclkiommu_clk9? ?!D_(OApci@1b500000!qcom,pcie-apq8064snps,dw-pcie DPP `zdbielbiparfconfigpci1BL0= _msi(Vi$%&'9 + . -@coreifacephy( l k j i haxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960tdefaultMDzcore_physical _O9?>? ?*@core_clkmaster_iface_clkslave_iface_clk@N Ehdmi-phyportsport@0Dendpointport@1Dendpointhdmi-phy@4a00400!qcom,hdmi-phy-8960D`zhdmi_phyhdmi_pll9?@slave_iface_clkWONmdp@5100000 !qcom,mdp4D _K09?M???N?_?`3@core_clkiface_clkbus_clklut_clkhdmi_clktv_clk FOOPPokayportsport@0Dendpointport@1DendpointQOIport@2Dendpointport@3Dendpointriva-pil@3204000!qcom,riva-pilD   @ zccudxepmunR wdogfatalSwTU* disabledOYiris !qcom,wcn366090@xo3VWXsmd-edge _ [rivawcnss !qcom,wcnss WCNSS_CTRLYbt!qcom,wcnss-btwifi!qcom,wcnss-wlan_txrxZ Z tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecellD9 @apb_pclkin-portsportendpoint[O]tpiu@1a03000!!arm,coresight-tpiuarm,primecellD09 @apb_pclkin-portsportendpoint\O^replicator !arm,coresight-static-replicator9 @apb_pclkout-portsport@0Dendpoint]O[port@1Dendpoint^O\in-portsportendpoint_Odfunnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellD@9 @apb_pclkin-portsport@0Dendpoint`Ofport@1DendpointaOhport@4DendpointbOjport@5DendpointcOlout-portsportendpointdO_etm@1a1c000"!arm,coresight-etm3xarm,primecellD9 @apb_pclkeout-portsportendpointfO`etm@1a1d000"!arm,coresight-etm3xarm,primecellD9 @apb_pclkgout-portsportendpointhOaetm@1a1e000"!arm,coresight-etm3xarm,primecellD9 @apb_pclkiout-portsportendpointjObetm@1a1f000"!arm,coresight-etm3xarm,primecellD9 @apb_pclkkout-portsportendpointlOcimem@2a03f000!sysconsimple-mfdD*reboot-mode!syscon-reboot-mode\wfU'wfU7wfUaliases#E/soc/gsbi@16600000/serial@16640000#M/soc/gsbi@16500000/serial@16540000chosenUserial0:115200n8regulator-fixed@1!regulator-fixed2Z2Z aext_3p3vpvoltage MOHgpio-keys !gpio-keysvolume_up [Volume Up &svolume_down [Volume Down &&r #address-cells#size-cellsmodelcompatibleinterrupt-parentrangesregno-mapphandlerecord-sizeconsole-sizeftrace-sizeenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizeqcom,controller-typegpio-rangesallow-set-timedebounceinterrupts-extended#io-channel-cellsnvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvdd_l1_l2_l12_l18-supplyvin_lvs1_3_6-supplyvin_lvs4_5_7-supplyvdd_l24-supplyvdd_l25-supplyvin_lvs2-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyvdd_ncp-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpbvdda-supplyvdd-supplyvddio-supplyavdd-supplyvcss-supplyremote-endpointdata-lanesvddp-supplyiovcc-supplyenable-gpiosreset-gpiosdcdc-en-gpios#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namescpumode-normalmode-bootloadermode-recoveryserial0serial1stdout-pathregulator-nameregulator-typestartup-delay-usgpioenable-active-highregulator-boot-onlinux,code